This is a note to let you know that I've just added the patch titled arm64: dts: imx8-ss-dma: fix pwm lpcg indices to the 6.8-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm64-dts-imx8-ss-dma-fix-pwm-lpcg-indices.patch and it can be found in the queue-6.8 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 9055d87bce7276234173fa90e9702af31b3f5353 Mon Sep 17 00:00:00 2001 From: Frank Li <Frank.Li@xxxxxxx> Date: Mon, 1 Apr 2024 18:25:06 -0400 Subject: arm64: dts: imx8-ss-dma: fix pwm lpcg indices From: Frank Li <Frank.Li@xxxxxxx> commit 9055d87bce7276234173fa90e9702af31b3f5353 upstream. adma_pwm_lpcg: clock-controller@5a590000 { ... col1 col2 clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>,// 0 0 <&dma_ipg_clk>; // 1 4 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>; ... }; Col1: index, which existing dts try to get. Col2: actual index in lpcg driver. adma_pwm: pwm@5a190000 { ... clocks = <&adma_pwm_lpcg 1>, <&adma_pwm_lpcg 0>; ^^ ^^ Should be clocks = <&adma_pwm_lpcg IMX_LPCG_CLK_4>, <&adma_pwm_lpcg IMX_LPCG_CLK_0>; }; Arg0 will be divided by 4 in lcpg driver, so pwm will get IMX_SC_PM_CLK_PER by <&adma_pwm_lpcg 1>, <&adma_pwm_lpcg 0>. Although function can work, code logic is wrong. Fix it by use correct indices. Cc: stable@xxxxxxxxxxxxxxx Fixes: f1d6a6b991ef ("arm64: dts: imx8qxp: add adma_pwm in adma") Signed-off-by: Frank Li <Frank.Li@xxxxxxx> Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -144,8 +144,8 @@ dma_subsys: bus@5a000000 { compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm"; reg = <0x5a190000 0x1000>; interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&adma_pwm_lpcg 1>, - <&adma_pwm_lpcg 0>; + clocks = <&adma_pwm_lpcg IMX_LPCG_CLK_4>, + <&adma_pwm_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; Patches currently in stable-queue which might be from Frank.Li@xxxxxxx are queue-6.8/arm64-dts-imx8-ss-dma-fix-can-lpcg-indices.patch queue-6.8/arm64-dts-imx8-ss-dma-fix-pwm-lpcg-indices.patch queue-6.8/arm64-dts-imx8-ss-lsio-fix-pwm-lpcg-indices.patch queue-6.8/arm64-dts-imx8-ss-conn-fix-usdhc-wrong-lpcg-clock-or.patch queue-6.8/arm64-dts-imx8-ss-dma-fix-adc-lpcg-indices.patch queue-6.8/arm64-dts-imx8qm-ss-dma-fix-can-lpcg-indices.patch queue-6.8/arm64-dts-imx8-ss-dma-fix-spi-lpcg-indices.patch queue-6.8/arm64-dts-imx8-ss-conn-fix-usb-lpcg-indices.patch