Patch "cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates()" has been added to the 6.8-stable tree

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This is a note to let you know that I've just added the patch titled

    cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates()

to the 6.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     cxl-remove-checking-of-iter-in-cxl_endpoint_get_perf.patch
and it can be found in the queue-6.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 8943cced8ea6c077eb842255cf56b8d4610876bd
Author: Dave Jiang <dave.jiang@xxxxxxxxx>
Date:   Wed Apr 3 08:47:12 2024 -0700

    cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates()
    
    [ Upstream commit 648dae58a830ecceea3b1bebf68432435980f137 ]
    
    The while() loop in cxl_endpoint_get_perf_coordinates() checks to see if
    'iter' is valid as part of the condition breaking out of the loop.
    is_cxl_root() will stop the loop before the next iteration could go NULL.
    Remove the iter check.
    
    The presence of the iter or removing the iter does not impact the behavior
    of the code. This is a code clean up and not a bug fix.
    
    Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
    Reviewed-by: Davidlohr Bueso <dave@xxxxxxxxxxxx>
    Reviewed-by: Dan Williams <dan.j.williams@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20240403154844.3403859-2-dave.jiang@xxxxxxxxx
    Signed-off-by: Dave Jiang <dave.jiang@xxxxxxxxx>
    Stable-dep-of: 592780b8391f ("cxl: Fix retrieving of access_coordinates in PCIe path")
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
index b2a2f6c34886d..0332b431117db 100644
--- a/drivers/cxl/core/port.c
+++ b/drivers/cxl/core/port.c
@@ -2160,7 +2160,7 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,
 	 * port each iteration. If the parent is cxl root then there is
 	 * nothing to gather.
 	 */
-	while (iter && !is_cxl_root(to_cxl_port(iter->dev.parent))) {
+	while (!is_cxl_root(to_cxl_port(iter->dev.parent))) {
 		cxl_coordinates_combine(&c, &c, &dport->sw_coord);
 		c.write_latency += dport->link_latency;
 		c.read_latency += dport->link_latency;




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