Patch "drm/amd/display: Revert Remove pixle rate limit for subvp" has been added to the 6.8-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amd/display: Revert Remove pixle rate limit for subvp

to the 6.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-display-revert-remove-pixle-rate-limit-for-s.patch
and it can be found in the queue-6.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 8e3e1c55f77838ae3e3875a5c228ed8d3ea368f7
Author: Wenjing Liu <wenjing.liu@xxxxxxx>
Date:   Mon Mar 4 11:20:27 2024 -0500

    drm/amd/display: Revert Remove pixle rate limit for subvp
    
    [ Upstream commit cf8c498694a443e28dc1222f3ab94677114a4724 ]
    
    This reverts commit 340383c734f8 ("drm/amd/display: Remove pixle rate
    limit for subvp")
    
    [why]
    The original commit causes a regression when subvp is applied
    on ODM required 8k60hz timing. The display shows black screen
    on boot. The issue can be recovered with hotplug. It also causes
    MPO to fail. We will temprarily revert this commit and investigate
    the root cause further.
    
    Cc: Mario Limonciello <mario.limonciello@xxxxxxx>
    Cc: Alex Deucher <alexander.deucher@xxxxxxx>
    Cc: stable@xxxxxxxxxxxxxxx
    Reviewed-by: Chaitanya Dhere <chaitanya.dhere@xxxxxxx>
    Reviewed-by: Martin Leung <martin.leung@xxxxxxx>
    Acked-by: Wayne Lin <wayne.lin@xxxxxxx>
    Signed-off-by: Wenjing Liu <wenjing.liu@xxxxxxx>
    Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index b49e1dc9d8ba5..a0a65e0991041 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -623,6 +623,7 @@ static bool dcn32_assign_subvp_pipe(struct dc *dc,
 		 * - Not TMZ surface
 		 */
 		if (pipe->plane_state && !pipe->top_pipe && !dcn32_is_center_timing(pipe) &&
+				!(pipe->stream->timing.pix_clk_100hz / 10000 > DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ) &&
 				(!dcn32_is_psr_capable(pipe) || (context->stream_count == 1 && dc->caps.dmub_caps.subvp_psr)) &&
 				dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_NONE &&
 				(refresh_rate < 120 || dcn32_allow_subvp_high_refresh_rate(dc, context, pipe)) &&




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