Patch "perf/x86/amd/core: Avoid register reset when CPU is dead" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    perf/x86/amd/core: Avoid register reset when CPU is dead

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     perf-x86-amd-core-avoid-register-reset-when-cpu-is-d.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 736ea21067dccb5cdeed7a2433cc8fbafcf04654
Author: Sandipan Das <sandipan.das@xxxxxxx>
Date:   Mon Jan 29 16:36:26 2024 +0530

    perf/x86/amd/core: Avoid register reset when CPU is dead
    
    [ Upstream commit ad8c91282c95f801c37812d59d2d9eba6899b384 ]
    
    When bringing a CPU online, some of the PMC and LBR related registers
    are reset. The same is done when a CPU is taken offline although that
    is unnecessary. This currently happens in the "cpu_dead" callback which
    is also incorrect as the callback runs on a control CPU instead of the
    one that is being taken offline. This also affects hibernation and
    suspend to RAM on some platforms as reported in the link below.
    
    Fixes: 21d59e3e2c40 ("perf/x86/amd/core: Detect PerfMonV2 support")
    Reported-by: Mario Limonciello <mario.limonciello@xxxxxxx>
    Signed-off-by: Sandipan Das <sandipan.das@xxxxxxx>
    Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
    Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/550a026764342cf7e5812680e3e2b91fe662b5ac.1706526029.git.sandipan.das@xxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index 04f4b96dec6df..fd091b9dd7067 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -604,7 +604,6 @@ static void amd_pmu_cpu_dead(int cpu)
 
 	kfree(cpuhw->lbr_sel);
 	cpuhw->lbr_sel = NULL;
-	amd_pmu_cpu_reset(cpu);
 
 	if (!x86_pmu.amd_nb_constraints)
 		return;




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