This is a note to let you know that I've just added the patch titled arm64: dts: mediatek: mt7986: add "#reset-cells" to infracfg to the 6.6-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: arm64-dts-mediatek-mt7986-add-reset-cells-to-infracf.patch and it can be found in the queue-6.6 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. commit 3ae8884d3a6fa662eafc810531bee122e9a8c08d Author: Rafał Miłecki <rafal@xxxxxxxxxx> Date: Mon Jan 1 19:20:40 2024 +0100 arm64: dts: mediatek: mt7986: add "#reset-cells" to infracfg [ Upstream commit d993daff5962b2dd08f32a83bb1c0e5fa75732ea ] MT7986's Infrastructure System Configuration Controller includes reset controller. It can reset blocks as specified in the include/dt-bindings/reset/mt7986-resets.h . Add #reset-cells so it can be referenced properly. This fixes: arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtb: infracfg@10001000: '#reset-cells' is a required property from schema $id: http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml# Fixes: 1f9986b258c2 ("arm64: dts: mediatek: add clock support for mt7986a") Cc: Sam Shih <sam.shih@xxxxxxxxxxxx> Signed-off-by: Rafał Miłecki <rafal@xxxxxxxxxx> Link: https://lore.kernel.org/r/20240101182040.28538-2-zajec5@xxxxxxxxx Signed-off-by: Matthias Brugger <matthias.bgg@xxxxxxxxx> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 7b6591509c54d..d974739eae1c9 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -153,6 +153,7 @@ infracfg: infracfg@10001000 { compatible = "mediatek,mt7986-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; wed_pcie: wed-pcie@10003000 {