Patch "arm64: dts: qcom: sm8550: Fix UFS PHY clocks" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sm8550: Fix UFS PHY clocks

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 5f333359bd8d8a3585f5344d3d666f9cc4425b8b
Author: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Date:   Wed Jan 31 12:37:39 2024 +0530

    arm64: dts: qcom: sm8550: Fix UFS PHY clocks
    
    [ Upstream commit 746ae23ad02004fe283e2edb45b7a060bbc36d46 ]
    
    QMP PHY used in SM8550 requires 3 clocks:
    
    * ref - 19.2MHz reference clock from RPMh
    * ref_aux - Auxiliary reference clock from GCC
    * qref - QREF clock from TCSR
    
    Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes")
    Reviewed-by: Can Guo <quic_cang@xxxxxxxxxxx>
    Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
    Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-16-58a49d2f4605@xxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 076715ef09d56..e0821039f43a1 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -1885,9 +1885,12 @@ crypto: crypto@1dfa000 {
 		ufs_mem_phy: phy@1d80000 {
 			compatible = "qcom,sm8550-qmp-ufs-phy";
 			reg = <0x0 0x01d80000 0x0 0x2000>;
-			clocks = <&tcsr TCSR_UFS_CLKREF_EN>,
-				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-			clock-names = "ref", "ref_aux";
+			clocks = <&rpmhcc RPMH_CXO_CLK>,
+				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
+				 <&tcsr TCSR_UFS_CLKREF_EN>;
+			clock-names = "ref",
+				      "ref_aux",
+				      "qref";
 
 			power-domains = <&gcc UFS_MEM_PHY_GDSC>;
 




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