Patch "arm64: dts: qcom: sm8250: Fix UFS PHY clocks" has been added to the 6.8-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sm8250: Fix UFS PHY clocks

to the 6.8-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
and it can be found in the queue-6.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 5a15a5c0b16dfecd9d6026379146826e57cfd100
Author: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Date:   Wed Jan 31 12:37:35 2024 +0530

    arm64: dts: qcom: sm8250: Fix UFS PHY clocks
    
    [ Upstream commit 55ee02b10bdd9577b6eabe98ebb383ec4e0674a7 ]
    
    QMP PHY used in SM8250 requires 3 clocks:
    
    * ref - 19.2MHz reference clock from RPMh
    * ref_aux - Auxiliary reference clock from GCC
    * qref - QREF clock from GCC
    
    While at it, let's move 'clocks' property before 'clock-names' to match
    the style used commonly.
    
    Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY")
    Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
    Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-12-58a49d2f4605@xxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 760501c1301a6..5e4265b2d80bd 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2506,10 +2506,12 @@ ufs_mem_phy: phy@1d87000 {
 			compatible = "qcom,sm8250-qmp-ufs-phy";
 			reg = <0 0x01d87000 0 0x1000>;
 
-			clock-names = "ref",
-				      "ref_aux";
 			clocks = <&rpmhcc RPMH_CXO_CLK>,
-				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
+				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
+				 <&gcc GCC_UFS_1X_CLKREF_EN>;
+			clock-names = "ref",
+				      "ref_aux",
+				      "qref";
 
 			resets = <&ufs_mem_hc 0>;
 			reset-names = "ufsphy";




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