Patch "drm/amdgpu: reset gpu for s3 suspend abort case" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amdgpu: reset gpu for s3 suspend abort case

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amdgpu-reset-gpu-for-s3-suspend-abort-case.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 48960f363cc1ee0bdc319bcab54603f063a9ed1f
Author: Prike Liang <Prike.Liang@xxxxxxx>
Date:   Wed Jan 17 13:39:37 2024 +0800

    drm/amdgpu: reset gpu for s3 suspend abort case
    
    [ Upstream commit 6ef82ac664bb9568ca3956e0d9c9c478e25077ff ]
    
    In the s3 suspend abort case some type of gfx9 power
    rail not turn off from FCH side and this will put the
    GPU in an unknown power status, so let's reset the gpu
    to a known good power state before reinitialize gpu
    device.
    
    Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
    Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index e8c0e77e1b018..6a3486f52d698 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1490,10 +1490,32 @@ static int soc15_common_suspend(void *handle)
 	return soc15_common_hw_fini(adev);
 }
 
+static bool soc15_need_reset_on_resume(struct amdgpu_device *adev)
+{
+	u32 sol_reg;
+
+	sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81);
+
+	/* Will reset for the following suspend abort cases.
+	 * 1) Only reset limit on APU side, dGPU hasn't checked yet.
+	 * 2) S3 suspend abort and TOS already launched.
+	 */
+	if (adev->flags & AMD_IS_APU && adev->in_s3 &&
+			!adev->suspend_complete &&
+			sol_reg)
+		return true;
+
+	return false;
+}
+
 static int soc15_common_resume(void *handle)
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+	if (soc15_need_reset_on_resume(adev)) {
+		dev_info(adev->dev, "S3 suspend abort case, let's reset ASIC.\n");
+		soc15_asic_reset(adev);
+	}
 	return soc15_common_hw_init(adev);
 }
 




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