This is a note to let you know that I've just added the patch titled
arm64/signal: Don't assume that TIF_SVE means we saved SVE state
to the 6.7-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-signal-don-t-assume-that-tif_sve-means-we-saved-sve-state.patch
and it can be found in the queue-6.7 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 61da7c8e2a602f66be578cbbcebe8638c10e0f48 Mon Sep 17 00:00:00 2001
From: Mark Brown <broonie@xxxxxxxxxx>
Date: Tue, 30 Jan 2024 15:43:53 +0000
Subject: arm64/signal: Don't assume that TIF_SVE means we saved SVE state
From: Mark Brown <broonie@xxxxxxxxxx>
commit 61da7c8e2a602f66be578cbbcebe8638c10e0f48 upstream.
When we are in a syscall we will only save the FPSIMD subset even though
the task still has access to the full register set, and on context switch
we will only remove TIF_SVE when loading the register state. This means
that the signal handling code should not assume that TIF_SVE means that
the register state is stored in SVE format, it should instead check the
format that was recorded during save.
Fixes: 8c845e273104 ("arm64/sve: Leave SVE enabled on syscall if we don't context switch")
Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Link: https://lore.kernel.org/r/20240130-arm64-sve-signal-regs-v2-1-9fc6f9502782@xxxxxxxxxx
Signed-off-by: Will Deacon <will@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/kernel/fpsimd.c | 2 +-
arch/arm64/kernel/signal.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -1628,7 +1628,7 @@ void fpsimd_preserve_current_state(void)
void fpsimd_signal_preserve_current_state(void)
{
fpsimd_preserve_current_state();
- if (test_thread_flag(TIF_SVE))
+ if (current->thread.fp_type == FP_STATE_SVE)
sve_to_fpsimd(current);
}
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -242,7 +242,7 @@ static int preserve_sve_context(struct s
vl = task_get_sme_vl(current);
vq = sve_vq_from_vl(vl);
flags |= SVE_SIG_FLAG_SM;
- } else if (test_thread_flag(TIF_SVE)) {
+ } else if (current->thread.fp_type == FP_STATE_SVE) {
vq = sve_vq_from_vl(vl);
}
@@ -878,7 +878,7 @@ static int setup_sigframe_layout(struct
if (system_supports_sve() || system_supports_sme()) {
unsigned int vq = 0;
- if (add_all || test_thread_flag(TIF_SVE) ||
+ if (add_all || current->thread.fp_type == FP_STATE_SVE ||
thread_sm_enabled(¤t->thread)) {
int vl = max(sve_max_vl(), sme_max_vl());
Patches currently in stable-queue which might be from broonie@xxxxxxxxxx are
queue-6.7/asoc-intel-avs-fix-dynamic-port-assignment-when-tdm-.patch
queue-6.7/asoc-intel-avs-fix-pci_probe-error-path.patch
queue-6.7/asoc-amd-yc-add-dmi-quirk-for-lenovo-ideapad-pro-5-16arp8.patch
queue-6.7/asoc-sof-ipc3-topology-fix-pipeline-tear-down-logic.patch
queue-6.7/asoc-codecs-wcd938x-handle-deferred-probe.patch
queue-6.7/arm64-signal-don-t-assume-that-tif_sve-means-we-saved-sve-state.patch
queue-6.7/asoc-sof-ipc3-fix-message-bounds-on-ipc-ops.patch
queue-6.7/spi-omap2-mcspi-revert-fifo-support-without-dma.patch
queue-6.7/spi-ppc4xx-drop-write-only-variable.patch
queue-6.7/spi-imx-fix-the-burst-length-at-dma-mode-and-cpu-mod.patch
queue-6.7/asoc-amd-yc-add-dmi-quirk-for-msi-bravo-15-c7vf.patch
queue-6.7/asoc-rt5645-fix-deadlock-in-rt5645_jack_detect_work.patch
queue-6.7/kselftest-dt-stop-relying-on-dirname-to-improve-perf.patch
queue-6.7/asoc-tas2781-add-module-parameter-to-tascodec_init.patch
