Patch "drm/amd/display: Fix disable_otg_wa logic" has been added to the 6.7-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    drm/amd/display: Fix disable_otg_wa logic

to the 6.7-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-display-fix-disable_otg_wa-logic.patch
and it can be found in the queue-6.7 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 8131e5eaf45f4307ad6afaaaf3b45fc0e6218719
Author: Nicholas Susanto <nicholas.susanto@xxxxxxx>
Date:   Fri Dec 1 06:25:15 2023 -0700

    drm/amd/display: Fix disable_otg_wa logic
    
    [ Upstream commit 2ce156482a6fef349d2eba98e5070c412d3af662 ]
    
    [Why]
    When switching to another HDMI mode, we are unnecesarilly
    disabling/enabling FIFO causing both HPO and DIG registers to be set at
    the same time when only HPO is supposed to be set.
    
    This can lead to a system hang the next time we change refresh rates as
    there are cases when we don't disable OTG/FIFO but FIFO is enabled when
    it isn't supposed to be.
    
    [How]
    Removing the enable/disable FIFO entirely.
    
    Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
    Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@xxxxxxx>
    Acked-by: Rodrigo Siqueira <rodrigo.siqueira@xxxxxxx>
    Signed-off-by: Nicholas Susanto <nicholas.susanto@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index 45ede6440a79..4ef90a3add1c 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
@@ -126,21 +126,13 @@ static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *
 			continue;
 		if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
 				     !pipe->stream->link_enc)) {
-			struct stream_encoder *stream_enc = pipe->stream_res.stream_enc;
-
 			if (disable) {
-				if (stream_enc && stream_enc->funcs->disable_fifo)
-					pipe->stream_res.stream_enc->funcs->disable_fifo(stream_enc);
-
 				if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)
 					pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
 
 				reset_sync_context_for_pipe(dc, context, i);
 			} else {
 				pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
-
-				if (stream_enc && stream_enc->funcs->enable_fifo)
-					pipe->stream_res.stream_enc->funcs->enable_fifo(stream_enc);
 			}
 		}
 	}