Patch "riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     riscv-fixed-wrong-register-in-xip_fixup_flash_offset.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit c9a053ac5625d6868ee78751f40c4bd818f7c081
Author: Frederik Haxel <haxel@xxxxxx>
Date:   Tue Dec 12 14:01:13 2023 +0100

    riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macro
    
    [ Upstream commit 5daa3726410288075ba73c336bb2e80d6b06aa4d ]
    
    During the refactoring, a bug was introduced in the rarly used
    XIP_FIXUP_FLASH_OFFSET macro.
    
    Fixes: bee7fbc38579 ("RISC-V CPU Idle Support")
    Fixes: e7681beba992 ("RISC-V: Split out the XIP fixups into their own file")
    
    Signed-off-by: Frederik Haxel <haxel@xxxxxx>
    Link: https://lore.kernel.org/r/20231212130116.848530-3-haxel@xxxxxx
    Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
index d4ffc3c37649..b65bf6306f69 100644
--- a/arch/riscv/include/asm/xip_fixup.h
+++ b/arch/riscv/include/asm/xip_fixup.h
@@ -13,7 +13,7 @@
         add \reg, \reg, t0
 .endm
 .macro XIP_FIXUP_FLASH_OFFSET reg
-	la t1, __data_loc
+	la t0, __data_loc
 	REG_L t1, _xip_phys_offset
 	sub \reg, \reg, t1
 	add \reg, \reg, t0




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