Patch "arm64: dts: qcom: sm8250: Make watchdog bark interrupt edge triggered" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sm8250: Make watchdog bark interrupt edge triggered

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sm8250-make-watchdog-bark-interrupt-e.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit a529e01ad35547e5d3f14f3efdba79a0643b779b
Author: Douglas Anderson <dianders@xxxxxxxxxxxx>
Date:   Mon Nov 6 14:43:32 2023 -0800

    arm64: dts: qcom: sm8250: Make watchdog bark interrupt edge triggered
    
    [ Upstream commit 735d80e2e8e5d073ae8b1fff8b1589ea284aa5af ]
    
    As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog
    bark interrupt edge triggered"), the Qualcomm watchdog timer's bark
    interrupt should be configured as edge triggered. Make the change.
    
    Fixes: 46a4359f9156 ("arm64: dts: qcom: sm8250: Add watchdog bark interrupt")
    Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
    Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
    Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20231106144335.v2.5.I2910e7c10493d896841e9785c1817df9b9a58701@changeid
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index a4e58ad731c3..1a98481d0c7f 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -5664,7 +5664,7 @@ watchdog@17c10000 {
 			compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt";
 			reg = <0 0x17c10000 0 0x1000>;
 			clocks = <&sleep_clk>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
 		};
 
 		timer@17c20000 {




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