Patch "KVM: PPC: Book3S HV: Handle pending exceptions on guest entry with MSR_EE" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    KVM: PPC: Book3S HV: Handle pending exceptions on guest entry with MSR_EE

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     kvm-ppc-book3s-hv-handle-pending-exceptions-on-guest.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 6d209116197be147166e00709118495c22202967
Author: Nicholas Piggin <npiggin@xxxxxxxxx>
Date:   Fri Dec 1 18:56:11 2023 +0530

    KVM: PPC: Book3S HV: Handle pending exceptions on guest entry with MSR_EE
    
    [ Upstream commit ecd10702baae5c16a91d139bde7eff84ce55daee ]
    
    Commit 026728dc5d41 ("KVM: PPC: Book3S HV P9: Inject pending xive
    interrupts at guest entry") changed guest entry so that if external
    interrupts are enabled, BOOK3S_IRQPRIO_EXTERNAL is not tested for. Test
    for this regardless of MSR_EE.
    
    For an L1 host, do not inject an interrupt, but always
    use LPCR_MER. If the L0 desires it can inject an interrupt.
    
    Fixes: 026728dc5d41 ("KVM: PPC: Book3S HV P9: Inject pending xive interrupts at guest entry")
    Signed-off-by: Nicholas Piggin <npiggin@xxxxxxxxx>
    [jpn: use kvmpcc_get_msr(), write commit message]
    Signed-off-by: Jordan Niethe <jniethe5@xxxxxxxxx>
    Signed-off-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
    Link: https://msgid.link/20231201132618.555031-7-vaibhav@xxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 11bc5aaea01f..0429488ba170 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -4663,13 +4663,19 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
 
 	if (!nested) {
 		kvmppc_core_prepare_to_enter(vcpu);
-		if (__kvmppc_get_msr_hv(vcpu) & MSR_EE) {
-			if (xive_interrupt_pending(vcpu))
+		if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
+			     &vcpu->arch.pending_exceptions) ||
+		    xive_interrupt_pending(vcpu)) {
+			/*
+			 * For nested HV, don't synthesize but always pass MER,
+			 * the L0 will be able to optimise that more
+			 * effectively than manipulating registers directly.
+			 */
+			if (!kvmhv_on_pseries() && (__kvmppc_get_msr_hv(vcpu) & MSR_EE))
 				kvmppc_inject_interrupt_hv(vcpu,
-						BOOK3S_INTERRUPT_EXTERNAL, 0);
-		} else if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
-			     &vcpu->arch.pending_exceptions)) {
-			lpcr |= LPCR_MER;
+							   BOOK3S_INTERRUPT_EXTERNAL, 0);
+			else
+				lpcr |= LPCR_MER;
 		}
 	} else if (vcpu->arch.pending_exceptions ||
 		   vcpu->arch.doorbell_request ||




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