Patch "arm64: dts: qcom: sm6350: Make watchdog bark interrupt edge triggered" has been added to the 6.7-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sm6350: Make watchdog bark interrupt edge triggered

to the 6.7-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sm6350-make-watchdog-bark-interrupt-e.patch
and it can be found in the queue-6.7 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit b80d680f36fa44349a7ec91adc4cae9174cf0726
Author: Douglas Anderson <dianders@xxxxxxxxxxxx>
Date:   Mon Nov 6 14:43:35 2023 -0800

    arm64: dts: qcom: sm6350: Make watchdog bark interrupt edge triggered
    
    [ Upstream commit 5b84bb2b8d86595544fc8272364b0f1a34b68a4f ]
    
    As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog
    bark interrupt edge triggered"), the Qualcomm watchdog timer's bark
    interrupt should be configured as edge triggered. Make the change.
    
    Fixes: 5f82b9cda61e ("arm64: dts: qcom: Add SM6350 device tree")
    Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
    Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
    Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20231106144335.v2.8.Ic1d4402e99c70354d501ccd98105e908a902f671@changeid
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8fd6f4d03490..6464e144c228 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2524,7 +2524,7 @@ watchdog@17c10000 {
 			compatible = "qcom,apss-wdt-sm6350", "qcom,kpss-wdt";
 			reg = <0 0x17c10000 0 0x1000>;
 			clocks = <&sleep_clk>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
 		};
 
 		timer@17c20000 {




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