Patch "arm64: dts: qcom: sdm845: Make watchdog bark interrupt edge triggered" has been added to the 6.7-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sdm845: Make watchdog bark interrupt edge triggered

to the 6.7-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sdm845-make-watchdog-bark-interrupt-e.patch
and it can be found in the queue-6.7 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 0200f1a3bf99395ae59e37f8cb00a70955631327
Author: Douglas Anderson <dianders@xxxxxxxxxxxx>
Date:   Mon Nov 6 14:43:30 2023 -0800

    arm64: dts: qcom: sdm845: Make watchdog bark interrupt edge triggered
    
    [ Upstream commit 263b348499454f38d36b9442c3cf9279c571bb54 ]
    
    As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog
    bark interrupt edge triggered"), the Qualcomm watchdog timer's bark
    interrupt should be configured as edge triggered. Make the change.
    
    Fixes: 36c436b03c58 ("arm64: dts: qcom: sdm845: Add watchdog bark interrupt")
    Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>
    Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
    Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20231106144335.v2.3.I16675ebe5517c68453a1bd7f4334ff885f806c03@changeid
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index bf5e6eb9d313..9648505644ff 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -5088,7 +5088,7 @@ watchdog@17980000 {
 			compatible = "qcom,apss-wdt-sdm845", "qcom,kpss-wdt";
 			reg = <0 0x17980000 0 0x1000>;
 			clocks = <&sleep_clk>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
 		};
 
 		apss_shared: mailbox@17990000 {




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