Patch "ASoC: fsl_xcvr: Enable 2 * TX bit clock for spdif only case" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    ASoC: fsl_xcvr: Enable 2 * TX bit clock for spdif only case

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     asoc-fsl_xcvr-enable-2-tx-bit-clock-for-spdif-only-c.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit b42aec0dd89e0a7f2a2292c092ce072f15e4700a
Author: Shengjiu Wang <shengjiu.wang@xxxxxxx>
Date:   Wed Nov 22 09:42:53 2023 +0800

    ASoC: fsl_xcvr: Enable 2 * TX bit clock for spdif only case
    
    [ Upstream commit c33fd110424dfcb544cf55a1b312f43fe1918235 ]
    
    The bit 10 in TX_DPTH_CTRL register controls the TX clock rate.
    If this bit is set, TX datapath clock should be = 2* TX bit rate.
    If this bit is not set, TX datapath clock should be 10* TX bit rate.
    
    As the spdif only case, we always use 2 * TX bit clock, so
    this bit need to be set.
    
    Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
    Link: https://lore.kernel.org/r/1700617373-6472-1-git-send-email-shengjiu.wang@xxxxxxx
    Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/sound/soc/fsl/fsl_xcvr.c b/sound/soc/fsl/fsl_xcvr.c
index fa0a15263c66..77f8e2394bf9 100644
--- a/sound/soc/fsl/fsl_xcvr.c
+++ b/sound/soc/fsl/fsl_xcvr.c
@@ -414,6 +414,16 @@ static int fsl_xcvr_prepare(struct snd_pcm_substream *substream,
 
 	switch (xcvr->mode) {
 	case FSL_XCVR_MODE_SPDIF:
+		if (xcvr->soc_data->spdif_only && tx) {
+			ret = regmap_update_bits(xcvr->regmap, FSL_XCVR_TX_DPTH_CTRL_SET,
+						 FSL_XCVR_TX_DPTH_CTRL_BYPASS_FEM,
+						 FSL_XCVR_TX_DPTH_CTRL_BYPASS_FEM);
+			if (ret < 0) {
+				dev_err(dai->dev, "Failed to set bypass fem: %d\n", ret);
+				return ret;
+			}
+		}
+		fallthrough;
 	case FSL_XCVR_MODE_ARC:
 		if (tx) {
 			ret = fsl_xcvr_en_aud_pll(xcvr, fout);




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