Patch "drm/amd/display: Increase num voltage states to 40" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amd/display: Increase num voltage states to 40

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-display-increase-num-voltage-states-to-40.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 281fed68e1e6d9e6e234dc7bccbb8296cf8b07d4
Author: Alvin Lee <alvin.lee2@xxxxxxx>
Date:   Wed Nov 8 17:16:28 2023 -0500

    drm/amd/display: Increase num voltage states to 40
    
    [ Upstream commit 67e38874b85b8df7b23d29f78ac3d7ecccd9519d ]
    
    [Description]
    If during driver init stage there are greater than 20
    intermediary voltage states while constructing the SOC
    BB we could hit issues because we will index outside of the
    clock_limits array and start overwriting data. Increase the
    total number of states to 40 to avoid this issue.
    
    Cc: stable@xxxxxxxxxxxxxxx # 6.1+
    Reviewed-by: Samson Tam <samson.tam@xxxxxxx>
    Acked-by: Hamza Mahfooz <hamza.mahfooz@xxxxxxx>
    Signed-off-by: Alvin Lee <alvin.lee2@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dc_features.h b/drivers/gpu/drm/amd/display/dc/dml/dc_features.h
index 2cbdd75429ffd..6e669a2c5b2d4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dc_features.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dc_features.h
@@ -36,7 +36,7 @@
  * Define the maximum amount of states supported by the ASIC. Every ASIC has a
  * specific number of states; this macro defines the maximum number of states.
  */
-#define DC__VOLTAGE_STATES 20
+#define DC__VOLTAGE_STATES 40
 #define DC__NUM_DPP__4 1
 #define DC__NUM_DPP__0_PRESENT 1
 #define DC__NUM_DPP__1_PRESENT 1




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