Patch "ASoC: fsl_sai: Fix channel swap issue on i.MX8MP" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    ASoC: fsl_sai: Fix channel swap issue on i.MX8MP

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     asoc-fsl_sai-fix-channel-swap-issue-on-i.mx8mp.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit d490af1ff2f3b34d4ade720bd33c871d4b38a2ad
Author: Shengjiu Wang <shengjiu.wang@xxxxxxx>
Date:   Tue Dec 19 10:30:57 2023 +0800

    ASoC: fsl_sai: Fix channel swap issue on i.MX8MP
    
    [ Upstream commit 8f0f01647550daf9cd8752c1656dcb0136d79ce1 ]
    
    When flag mclk_with_tere and mclk_direction_output enabled,
    The SAI transmitter or receiver will be enabled in very early
    stage, that if FSL_SAI_xMR is set by previous case,
    for example previous case is one channel, current case is
    two channels, then current case started with wrong xMR in
    the beginning, then channel swap happen.
    
    The patch is to clear xMR in hw_free() to avoid such
    channel swap issue.
    
    Fixes: 3e4a82612998 ("ASoC: fsl_sai: MCLK bind with TX/RX enable bit")
    Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
    Reviewed-by: Daniel Baluta <daniel.baluta@xxxxxxx>
    Link: https://msgid.link/r/1702953057-4499-1-git-send-email-shengjiu.wang@xxxxxxx
    Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 3252eefc4bc0e..3d202398c5411 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -715,6 +715,9 @@ static int fsl_sai_hw_free(struct snd_pcm_substream *substream,
 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 	unsigned int ofs = sai->soc_data->reg_offset;
 
+	/* Clear xMR to avoid channel swap with mclk_with_tere enabled case */
+	regmap_write(sai->regmap, FSL_SAI_xMR(tx), 0);
+
 	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),
 			   FSL_SAI_CR3_TRCE_MASK, 0);
 




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