Patch "phy: mediatek: mipi: mt8183: fix minimal supported frequency" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    phy: mediatek: mipi: mt8183: fix minimal supported frequency

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     phy-mediatek-mipi-mt8183-fix-minimal-supported-frequ.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 0955bb1c68b77ebad110df017b13c71f5bc16043
Author: Michael Walle <mwalle@xxxxxxxxxx>
Date:   Thu Nov 23 12:02:02 2023 +0100

    phy: mediatek: mipi: mt8183: fix minimal supported frequency
    
    [ Upstream commit 06f76e464ac81c6915430b7155769ea4ef16efe4 ]
    
    The lowest supported clock frequency of the PHY is 125MHz (see also
    mtk_mipi_tx_pll_enable()), but the clamping in .round_rate() has the
    wrong minimal value, which will make the .enable() op return -EINVAL on
    low frequencies. Fix the minimal clamping value.
    
    Fixes: efda51a58b4a ("drm/mediatek: add mipi_tx driver for mt8183")
    Signed-off-by: Michael Walle <mwalle@xxxxxxxxxx>
    Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20231123110202.2025585-1-mwalle@xxxxxxxxxx
    Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
index f021ec5a70e5c..553725e1269c9 100644
--- a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
+++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
@@ -100,7 +100,7 @@ static void mtk_mipi_tx_pll_disable(struct clk_hw *hw)
 static long mtk_mipi_tx_pll_round_rate(struct clk_hw *hw, unsigned long rate,
 				       unsigned long *prate)
 {
-	return clamp_val(rate, 50000000, 1600000000);
+	return clamp_val(rate, 125000000, 1600000000);
 }
 
 static const struct clk_ops mtk_mipi_tx_pll_ops = {




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