Patch "accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization" has been added to the 6.6-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     accel-ivpu-37xx-fix-interrupt_clear_with_0-wa-initia.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 238f1cdf61f9fb4633d5be47be3582fa82088ad2
Author: Andrzej Kacprowski <Andrzej.Kacprowski@xxxxxxxxx>
Date:   Mon Dec 4 13:23:31 2023 +0100

    accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization
    
    [ Upstream commit 35c49cfc8b702eda7a0d3f05497b16f81b69e289 ]
    
    Using PCI Device ID/Revision to initialize the interrupt_clear_with_0
    workaround is problematic - there are many pre-production
    steppings with different behavior, even with the same PCI ID/Revision
    
    Instead of checking for PCI Device ID/Revision, check the VPU
    buttress interrupt status register behavior - if this register
    is not zero after writing 1s it means there register is RW
    instead of RW1C and we need to enable the interrupt_clear_with_0
    workaround.
    
    Fixes: 7f34e01f77f8 ("accel/ivpu: Clear specific interrupt status bits on C0")
    Signed-off-by: Andrzej Kacprowski <Andrzej.Kacprowski@xxxxxxxxx>
    Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@xxxxxxxxxxxxxxx>
    Reviewed-by: Jeffrey Hugo <quic_jhugo@xxxxxxxxxxx>
    Link: https://lore.kernel.org/all/20231204122331.40560-1-jacek.lawrynowicz@xxxxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/accel/ivpu/ivpu_hw_37xx.c b/drivers/accel/ivpu/ivpu_hw_37xx.c
index 2409ff0dda619..ddf03498fd4c1 100644
--- a/drivers/accel/ivpu/ivpu_hw_37xx.c
+++ b/drivers/accel/ivpu/ivpu_hw_37xx.c
@@ -53,10 +53,12 @@
 
 #define ICB_0_1_IRQ_MASK ((((u64)ICB_1_IRQ_MASK) << 32) | ICB_0_IRQ_MASK)
 
-#define BUTTRESS_IRQ_MASK ((REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE)) | \
-			   (REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \
+#define BUTTRESS_IRQ_MASK ((REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \
 			   (REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, UFI_ERR)))
 
+#define BUTTRESS_ALL_IRQ_MASK (BUTTRESS_IRQ_MASK | \
+			       (REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE)))
+
 #define BUTTRESS_IRQ_ENABLE_MASK ((u32)~BUTTRESS_IRQ_MASK)
 #define BUTTRESS_IRQ_DISABLE_MASK ((u32)-1)
 
@@ -102,8 +104,12 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev)
 	vdev->wa.clear_runtime_mem = false;
 	vdev->wa.d3hot_after_power_off = true;
 
-	if (ivpu_device_id(vdev) == PCI_DEVICE_ID_MTL && ivpu_revision(vdev) < 4)
+	REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, BUTTRESS_ALL_IRQ_MASK);
+	if (REGB_RD32(VPU_37XX_BUTTRESS_INTERRUPT_STAT) == BUTTRESS_ALL_IRQ_MASK) {
+		/* Writing 1s does not clear the interrupt status register */
 		vdev->wa.interrupt_clear_with_0 = true;
+		REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, 0x0);
+	}
 
 	IVPU_PRINT_WA(punit_disabled);
 	IVPU_PRINT_WA(clear_runtime_mem);