This is a note to let you know that I've just added the patch titled
parisc: Use natural CPU alignment for bug_table
to the 6.6-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
parisc-use-natural-cpu-alignment-for-bug_table.patch
and it can be found in the queue-6.6 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From fe76a1349f235969381832c83d703bc911021eb6 Mon Sep 17 00:00:00 2001
From: Helge Deller <deller@xxxxxx>
Date: Mon, 20 Nov 2023 23:30:49 +0100
Subject: parisc: Use natural CPU alignment for bug_table
From: Helge Deller <deller@xxxxxx>
commit fe76a1349f235969381832c83d703bc911021eb6 upstream.
Make sure that the __bug_table section gets 32- or 64-bit aligned,
depending if a 32- or 64-bit kernel is being built.
Mark it non-writeable and use .blockz instead of the .org assembler
directive to pad the struct.
Signed-off-by: Helge Deller <deller@xxxxxx>
Cc: stable@xxxxxxxxxxxxxxx # v6.0+
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/parisc/include/asm/bug.h | 30 ++++++++++++++++++------------
1 file changed, 18 insertions(+), 12 deletions(-)
--- a/arch/parisc/include/asm/bug.h
+++ b/arch/parisc/include/asm/bug.h
@@ -28,13 +28,15 @@
do { \
asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
- "\t.pushsection __bug_table,\"aw\"\n" \
+ "\t.pushsection __bug_table,\"a\"\n" \
+ "\t.align %4\n" \
"2:\t" ASM_WORD_INSN "1b, %c0\n" \
- "\t.short %c1, %c2\n" \
- "\t.org 2b+%c3\n" \
+ "\t.short %1, %2\n" \
+ "\t.blockz %3-2*%4-2*2\n" \
"\t.popsection" \
: : "i" (__FILE__), "i" (__LINE__), \
- "i" (0), "i" (sizeof(struct bug_entry)) ); \
+ "i" (0), "i" (sizeof(struct bug_entry)), \
+ "i" (sizeof(long)) ); \
unreachable(); \
} while(0)
@@ -51,27 +53,31 @@
do { \
asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
- "\t.pushsection __bug_table,\"aw\"\n" \
+ "\t.pushsection __bug_table,\"a\"\n" \
+ "\t.align %4\n" \
"2:\t" ASM_WORD_INSN "1b, %c0\n" \
- "\t.short %c1, %c2\n" \
- "\t.org 2b+%c3\n" \
+ "\t.short %1, %2\n" \
+ "\t.blockz %3-2*%4-2*2\n" \
"\t.popsection" \
: : "i" (__FILE__), "i" (__LINE__), \
"i" (BUGFLAG_WARNING|(flags)), \
- "i" (sizeof(struct bug_entry)) ); \
+ "i" (sizeof(struct bug_entry)), \
+ "i" (sizeof(long)) ); \
} while(0)
#else
#define __WARN_FLAGS(flags) \
do { \
asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
- "\t.pushsection __bug_table,\"aw\"\n" \
+ "\t.pushsection __bug_table,\"a\"\n" \
+ "\t.align %2\n" \
"2:\t" ASM_WORD_INSN "1b\n" \
- "\t.short %c0\n" \
- "\t.org 2b+%c1\n" \
+ "\t.short %0\n" \
+ "\t.blockz %1-%2-2\n" \
"\t.popsection" \
: : "i" (BUGFLAG_WARNING|(flags)), \
- "i" (sizeof(struct bug_entry)) ); \
+ "i" (sizeof(struct bug_entry)), \
+ "i" (sizeof(long)) ); \
} while(0)
#endif
Patches currently in stable-queue which might be from deller@xxxxxx are
queue-6.6/parisc-ensure-32-bit-alignment-on-parisc-unwind-section.patch
queue-6.6/parisc-mark-jump_table-naturally-aligned.patch
queue-6.6/parisc-mark-ex_table-entries-32-bit-aligned-in-uaccess.h.patch
queue-6.6/parisc-mark-altinstructions-read-only-and-32-bit-aligned.patch
queue-6.6/parisc-mark-ex_table-entries-32-bit-aligned-in-assembly.h.patch
queue-6.6/parisc-drop-the-hp-ux-enosym-and-eremoterelease-error-codes.patch
queue-6.6/parisc-mark-lock_aligned-variables-16-byte-aligned-on-smp.patch
queue-6.6/parisc-use-natural-cpu-alignment-for-bug_table.patch
