Patch "riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause" has been added to the 6.5-stable tree

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This is a note to let you know that I've just added the patch titled

    riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause

to the 6.5-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     riscv-using-toolchain_has_zihintpause-marco-replace-zihintpause.patch
and it can be found in the queue-6.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From dd16ac404a685cce07e67261a94c6225d90ea7ba Mon Sep 17 00:00:00 2001
From: Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>
Date: Wed, 2 Aug 2023 14:42:15 +0800
Subject: riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause

From: Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>

commit dd16ac404a685cce07e67261a94c6225d90ea7ba upstream.

Actually it is a part of Conor's
commit aae538cd03bc ("riscv: fix detection of toolchain
Zihintpause support").
It is looks like a merge issue. Samuel's
commit 0b1d60d6dd9e ("riscv: Fix build with
CONFIG_CC_OPTIMIZE_FOR_SIZE=y") do not base on Conor's commit and
revert to __riscv_zihintpause. So this patch can fix it.

Signed-off-by: Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>
Fixes: 3c349eacc559 ("Merge patch "riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y"")
Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20230802064215.31111-1-minda.chen@xxxxxxxxxxxxxxxx
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 arch/riscv/include/asm/vdso/processor.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h
index 14f5d27783b8..96b65a5396df 100644
--- a/arch/riscv/include/asm/vdso/processor.h
+++ b/arch/riscv/include/asm/vdso/processor.h
@@ -14,7 +14,7 @@ static inline void cpu_relax(void)
 	__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
 #endif
 
-#ifdef __riscv_zihintpause
+#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE
 	/*
 	 * Reduce instruction retirement.
 	 * This assumes the PC changes.
-- 
2.43.0



Patches currently in stable-queue which might be from minda.chen@xxxxxxxxxxxxxxxx are

queue-6.5/riscv-using-toolchain_has_zihintpause-marco-replace-zihintpause.patch



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