Patch "riscv: kprobes: allow writing to x0" has been added to the 6.5-stable tree

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This is a note to let you know that I've just added the patch titled

    riscv: kprobes: allow writing to x0

to the 6.5-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     riscv-kprobes-allow-writing-to-x0.patch
and it can be found in the queue-6.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 8cb22bec142624d21bc85ff96b7bad10b6220e6a Mon Sep 17 00:00:00 2001
From: Nam Cao <namcaov@xxxxxxxxx>
Date: Tue, 29 Aug 2023 20:25:00 +0200
Subject: riscv: kprobes: allow writing to x0

From: Nam Cao <namcaov@xxxxxxxxx>

commit 8cb22bec142624d21bc85ff96b7bad10b6220e6a upstream.

Instructions can write to x0, so we should simulate these instructions
normally.

Currently, the kernel hangs if an instruction who writes to x0 is
simulated.

Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Nam Cao <namcaov@xxxxxxxxx>
Reviewed-by: Charlie Jenkins <charlie@xxxxxxxxxxxx>
Acked-by: Guo Ren <guoren@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230829182500.61875-1-namcaov@xxxxxxxxx
Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 arch/riscv/kernel/probes/simulate-insn.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/riscv/kernel/probes/simulate-insn.c
+++ b/arch/riscv/kernel/probes/simulate-insn.c
@@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(s
 				       unsigned long val)
 {
 	if (index == 0)
-		return false;
+		return true;
 	else if (index <= 31)
 		*((unsigned long *)regs + index) = val;
 	else


Patches currently in stable-queue which might be from namcaov@xxxxxxxxx are

queue-6.5/riscv-put-interrupt-entries-into-.irqentry.text.patch
queue-6.5/riscv-kprobes-allow-writing-to-x0.patch
queue-6.5/riscv-provide-riscv-specific-is_trap_insn.patch



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