Patch "arm64: tegra: Use correct interrupts for Tegra234 TKE" has been added to the 6.5-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    arm64: tegra: Use correct interrupts for Tegra234 TKE

to the 6.5-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-tegra-use-correct-interrupts-for-tegra234-tke.patch
and it can be found in the queue-6.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit f594fe8daa2f213f748170813975528e8b6be657
Author: Thierry Reding <treding@xxxxxxxxxx>
Date:   Thu Oct 12 14:43:11 2023 +0200

    arm64: tegra: Use correct interrupts for Tegra234 TKE
    
    [ Upstream commit c0b80988eb78d6423249ab530bfbc6b238790a26 ]
    
    The shared interrupts 0-9 of the TKE are mapped to interrupts 0-9, but
    shared interrupts 10-15 are mapped to 256-261. Correct the mapping for
    the final 6 interrupts. This prevents the TKE from requesting the RTC
    interrupt (along with several GTE and watchdog interrupts).
    
    Reported-by: Shubhi Garg <shgarg@xxxxxxxxxx>
    Fixes: 28d860ed02c2 ("arm64: tegra: Enable native timers on Tegra234")
    Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>
    Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 0f12a8debd8ae..1a1dd35aff26a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -43,12 +43,12 @@ timer@2080000 {
 				     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 			status = "okay";
 		};