Patch "clocksource/drivers/arm_arch_timer: limit XGene-1 workaround" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    clocksource/drivers/arm_arch_timer: limit XGene-1 workaround

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clocksource-drivers-arm_arch_timer-limit-xgene-1-wor.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 0d84fac153bc692d3f88f0857e5f94a55ecf5a46
Author: Andre Przywara <andre.przywara@xxxxxxx>
Date:   Mon Oct 16 16:31:27 2023 +0100

    clocksource/drivers/arm_arch_timer: limit XGene-1 workaround
    
    [ Upstream commit 851354cbd12bb9500909733c3d4054306f61df87 ]
    
    The AppliedMicro XGene-1 CPU has an erratum where the timer condition
    would only consider TVAL, not CVAL. We currently apply a workaround when
    seeing the PartNum field of MIDR_EL1 being 0x000, under the assumption
    that this would match only the XGene-1 CPU model.
    However even the Ampere eMAG (aka XGene-3) uses that same part number, and
    only differs in the "Variant" and "Revision" fields: XGene-1's MIDR is
    0x500f0000, our eMAG reports 0x503f0002. Experiments show the latter
    doesn't show the faulty behaviour.
    
    Increase the specificity of the check to only consider partnum 0x000 and
    variant 0x00, to exclude the Ampere eMAG.
    
    Fixes: 012f18850452 ("clocksource/drivers/arm_arch_timer: Work around broken CVAL implementations")
    Reported-by: Ross Burton <ross.burton@xxxxxxx>
    Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
    Acked-by: Marc Zyngier <maz@xxxxxxxxxx>
    Reviewed-by: Oliver Upton <oliver.upton@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20231016153127.116101-1-andre.przywara@xxxxxxx
    Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 357932938b5ab..7dce9c0aa7836 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -85,7 +85,8 @@
 #define ARM_CPU_PART_NEOVERSE_N2	0xD49
 #define ARM_CPU_PART_CORTEX_A78C	0xD4B
 
-#define APM_CPU_PART_POTENZA		0x000
+#define APM_CPU_PART_XGENE		0x000
+#define APM_CPU_VAR_POTENZA		0x00
 
 #define CAVIUM_CPU_PART_THUNDERX	0x0A1
 #define CAVIUM_CPU_PART_THUNDERX_81XX	0x0A2
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index dd20b8688d230..f44ae09a51956 100644
--- a/arch/arm64/kvm/guest.c
+++ b/arch/arm64/kvm/guest.c
@@ -863,7 +863,7 @@ u32 __attribute_const__ kvm_target_cpu(void)
 		break;
 	case ARM_CPU_IMP_APM:
 		switch (part_number) {
-		case APM_CPU_PART_POTENZA:
+		case APM_CPU_PART_XGENE:
 			return KVM_ARM_TARGET_XGENE_POTENZA;
 		}
 		break;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 239c70ac120e8..fee1c4bf10214 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -817,8 +817,9 @@ static u64 __arch_timer_check_delta(void)
 		 * Note that TVAL is signed, thus has only 31 of its
 		 * 32 bits to express magnitude.
 		 */
-		MIDR_ALL_VERSIONS(MIDR_CPU_MODEL(ARM_CPU_IMP_APM,
-						 APM_CPU_PART_POTENZA)),
+		MIDR_REV_RANGE(MIDR_CPU_MODEL(ARM_CPU_IMP_APM,
+					      APM_CPU_PART_XGENE),
+			       APM_CPU_VAR_POTENZA, 0x0, 0xf),
 		{},
 	};
 



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