Patch "mtd: rawnand: marvell: Ensure program page operations are successful" has been added to the 5.4-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    mtd: rawnand: marvell: Ensure program page operations are successful

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mtd-rawnand-marvell-ensure-program-page-operations-a.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit d25d6ad748812d887cca84b0287086510812ef13
Author: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
Date:   Mon Jul 17 21:42:19 2023 +0200

    mtd: rawnand: marvell: Ensure program page operations are successful
    
    [ Upstream commit 3e01d5254698ea3d18e09d96b974c762328352cd ]
    
    The NAND core complies with the ONFI specification, which itself
    mentions that after any program or erase operation, a status check
    should be performed to see whether the operation was finished *and*
    successful.
    
    The NAND core offers helpers to finish a page write (sending the
    "PAGE PROG" command, waiting for the NAND chip to be ready again, and
    checking the operation status). But in some cases, advanced controller
    drivers might want to optimize this and craft their own page write
    helper to leverage additional hardware capabilities, thus not always
    using the core facilities.
    
    Some drivers, like this one, do not use the core helper to finish a page
    write because the final cycles are automatically managed by the
    hardware. In this case, the additional care must be taken to manually
    perform the final status check.
    
    Let's read the NAND chip status at the end of the page write helper and
    return -EIO upon error.
    
    Cc: stable@xxxxxxxxxxxxxxx
    Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver")
    Reported-by: Aviram Dali <aviramd@xxxxxxxxxxx>
    Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
    Tested-by: Ravi Chandra Minnikanti <rminnikanti@xxxxxxxxxxx>
    Link: https://lore.kernel.org/linux-mtd/20230717194221.229778-1-miquel.raynal@xxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index c49a3e105b427..9a119688c0a63 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -1109,6 +1109,7 @@ static int marvell_nfc_hw_ecc_hmg_do_write_page(struct nand_chip *chip,
 		.ndcb[2] = NDCB2_ADDR5_PAGE(page),
 	};
 	unsigned int oob_bytes = lt->spare_bytes + (raw ? lt->ecc_bytes : 0);
+	u8 status;
 	int ret;
 
 	/* NFCv2 needs more information about the operation being executed */
@@ -1142,7 +1143,18 @@ static int marvell_nfc_hw_ecc_hmg_do_write_page(struct nand_chip *chip,
 
 	ret = marvell_nfc_wait_op(chip,
 				  PSEC_TO_MSEC(chip->data_interface.timings.sdr.tPROG_max));
-	return ret;
+	if (ret)
+		return ret;
+
+	/* Check write status on the chip side */
+	ret = nand_status_op(chip, &status);
+	if (ret)
+		return ret;
+
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
+
+	return 0;
 }
 
 static int marvell_nfc_hw_ecc_hmg_write_page_raw(struct nand_chip *chip,
@@ -1570,6 +1582,7 @@ static int marvell_nfc_hw_ecc_bch_write_page(struct nand_chip *chip,
 	int data_len = lt->data_bytes;
 	int spare_len = lt->spare_bytes;
 	int chunk, ret;
+	u8 status;
 
 	marvell_nfc_select_target(chip, chip->cur_cs);
 
@@ -1607,6 +1620,14 @@ static int marvell_nfc_hw_ecc_bch_write_page(struct nand_chip *chip,
 	if (ret)
 		return ret;
 
+	/* Check write status on the chip side */
+	ret = nand_status_op(chip, &status);
+	if (ret)
+		return ret;
+
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
+
 	return 0;
 }