Patch "mtd: rawnand: arasan: Ensure program page operations are successful" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    mtd: rawnand: arasan: Ensure program page operations are successful

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mtd-rawnand-arasan-ensure-program-page-operations-are-successful.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 3a4a893dbb19e229db3b753f0462520b561dee98 Mon Sep 17 00:00:00 2001
From: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
Date: Mon, 17 Jul 2023 21:42:20 +0200
Subject: mtd: rawnand: arasan: Ensure program page operations are successful

From: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>

commit 3a4a893dbb19e229db3b753f0462520b561dee98 upstream.

The NAND core complies with the ONFI specification, which itself
mentions that after any program or erase operation, a status check
should be performed to see whether the operation was finished *and*
successful.

The NAND core offers helpers to finish a page write (sending the
"PAGE PROG" command, waiting for the NAND chip to be ready again, and
checking the operation status). But in some cases, advanced controller
drivers might want to optimize this and craft their own page write
helper to leverage additional hardware capabilities, thus not always
using the core facilities.

Some drivers, like this one, do not use the core helper to finish a page
write because the final cycles are automatically managed by the
hardware. In this case, the additional care must be taken to manually
perform the final status check.

Let's read the NAND chip status at the end of the page write helper and
return -EIO upon error.

Cc: Michal Simek <michal.simek@xxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Fixes: 88ffef1b65cf ("mtd: rawnand: arasan: Support the hardware BCH ECC engine")
Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
Acked-by: Michal Simek <michal.simek@xxxxxxx>
Link: https://lore.kernel.org/linux-mtd/20230717194221.229778-2-miquel.raynal@xxxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 drivers/mtd/nand/raw/arasan-nand-controller.c |   16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

--- a/drivers/mtd/nand/raw/arasan-nand-controller.c
+++ b/drivers/mtd/nand/raw/arasan-nand-controller.c
@@ -451,6 +451,7 @@ static int anfc_write_page_hw_ecc(struct
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	unsigned int len = mtd->writesize + (oob_required ? mtd->oobsize : 0);
 	dma_addr_t dma_addr;
+	u8 status;
 	int ret;
 	struct anfc_op nfc_op = {
 		.pkt_reg =
@@ -497,10 +498,21 @@ static int anfc_write_page_hw_ecc(struct
 	}
 
 	/* Spare data is not protected */
-	if (oob_required)
+	if (oob_required) {
 		ret = nand_write_oob_std(chip, page);
+		if (ret)
+			return ret;
+	}
+
+	/* Check write status on the chip side */
+	ret = nand_status_op(chip, &status);
+	if (ret)
+		return ret;
+
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
 
-	return ret;
+	return 0;
 }
 
 static int anfc_sel_write_page_hw_ecc(struct nand_chip *chip, const u8 *buf,


Patches currently in stable-queue which might be from miquel.raynal@xxxxxxxxxxx are

queue-5.10/mtd-rawnand-arasan-ensure-program-page-operations-are-successful.patch
queue-5.10/mtd-physmap-core-restore-map_rom-fallback.patch
queue-5.10/mtd-rawnand-qcom-unmap-the-right-resource-upon-probe-failure.patch
queue-5.10/pinctrl-renesas-rzn1-enable-missing-pinmux.patch
queue-5.10/mtd-rawnand-marvell-ensure-program-page-operations-are-successful.patch
queue-5.10/mtd-spinand-micron-correct-bitmask-for-ecc-status.patch



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