Patch "arm64: Avoid repeated AA64MMFR1_EL1 register read on pagefault path" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: Avoid repeated AA64MMFR1_EL1 register read on pagefault path

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-avoid-repeated-aa64mmfr1_el1-register-read-on-.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 5542cbfe40b5adaa14b2ef882139a5058195903b
Author: Gabriel Krisman Bertazi <krisman@xxxxxxx>
Date:   Mon Jan 9 12:19:55 2023 -0300

    arm64: Avoid repeated AA64MMFR1_EL1 register read on pagefault path
    
    [ Upstream commit a89c6bcdac22bec1bfbe6e64060b4cf5838d4f47 ]
    
    Accessing AA64MMFR1_EL1 is expensive in KVM guests, since it is emulated
    in the hypervisor.  In fact, ARM documentation mentions some feature
    registers are not supposed to be accessed frequently by the OS, and
    therefore should be emulated for guests [1].
    
    Commit 0388f9c74330 ("arm64: mm: Implement
    arch_wants_old_prefaulted_pte()") introduced a read of this register in
    the page fault path.  But, even when the feature of setting faultaround
    pages with the old flag is disabled for a given cpu, we are still paying
    the cost of checking the register on every pagefault. This results in an
    explosion of vmexit events in KVM guests, which directly impacts the
    performance of virtualized workloads.  For instance, running kernbench
    yields a 15% increase in system time solely due to the increased vmexit
    cycles.
    
    This patch avoids the extra cost by using the sanitized cached value.
    It should be safe to do so, since this register mustn't change for a
    given cpu.
    
    [1] https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/Learn%20the%20Architecture/Armv8-A%20virtualization.pdf?revision=a765a7df-1a00-434d-b241-357bfda2dd31
    
    Signed-off-by: Gabriel Krisman Bertazi <krisman@xxxxxxx>
    Acked-by: Will Deacon <will@xxxxxxxxxx>
    Reviewed-by: Anshuman Khandual <anshuman.khandual@xxxxxxx>
    Link: https://lore.kernel.org/r/20230109151955.8292-1-krisman@xxxxxxx
    Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index f73f11b550425..5bf0f9aa46267 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -863,7 +863,11 @@ static inline bool cpu_has_hw_af(void)
 	if (!IS_ENABLED(CONFIG_ARM64_HW_AFDBM))
 		return false;
 
-	mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
+	/*
+	 * Use cached version to avoid emulated msr operation on KVM
+	 * guests.
+	 */
+	mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);
 	return cpuid_feature_extract_unsigned_field(mmfr1,
 						ID_AA64MMFR1_EL1_HAFDBS_SHIFT);
 }



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