Patch "drm/amdgpu: set completion status as preempted for the resubmission" has been added to the 6.5-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amdgpu: set completion status as preempted for the resubmission

to the 6.5-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amdgpu-set-completion-status-as-preempted-for-th.patch
and it can be found in the queue-6.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit c0721278e19c9fb9716fb8ccd102cf5a0807b531
Author: Jiadong Zhu <Jiadong.Zhu@xxxxxxx>
Date:   Wed Jul 26 15:21:48 2023 +0800

    drm/amdgpu: set completion status as preempted for the resubmission
    
    [ Upstream commit 8cbbd11547f61b90b33a4ef70c4614eb2e789c49 ]
    
    The driver's CSA buffer is shared by all the ibs. When the high priority ib
    is submitted after the preempted ib, CP overrides the ib_completion_status
    as completed in the csa buffer. After that the preempted ib is resubmitted,
    CP would clear some locals stored for ib resume when reading the completed
    status, which causes gpu hang in some cases.
    
    Always set status as preempted for those resubmitted ib instead of reading
    everything from the CSA buffer.
    
    Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2535
    Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2717
    Signed-off-by: Jiadong Zhu <Jiadong.Zhu@xxxxxxx>
    Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h
index b22d4fb2a8470..d3186b570b82e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h
@@ -56,6 +56,15 @@ enum amdgpu_ring_mux_offset_type {
 	AMDGPU_MUX_OFFSET_TYPE_CE,
 };
 
+enum ib_complete_status {
+	/* IB not started/reset value, default value. */
+	IB_COMPLETION_STATUS_DEFAULT = 0,
+	/* IB preempted, started but not completed. */
+	IB_COMPLETION_STATUS_PREEMPTED = 1,
+	/* IB completed. */
+	IB_COMPLETION_STATUS_COMPLETED = 2,
+};
+
 struct amdgpu_ring_mux {
 	struct amdgpu_ring      *real_ring;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 65577eca58f1c..372ae2fc42e0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -5230,6 +5230,9 @@ static void gfx_v9_0_ring_patch_de_meta(struct amdgpu_ring *ring,
 		de_payload_cpu_addr = adev->virt.csa_cpu_addr + payload_offset;
 	}
 
+	((struct v9_de_ib_state *)de_payload_cpu_addr)->ib_completion_status =
+		IB_COMPLETION_STATUS_PREEMPTED;
+
 	if (offset + (payload_size >> 2) <= ring->buf_mask + 1) {
 		memcpy((void *)&ring->ring[offset], de_payload_cpu_addr, payload_size);
 	} else {



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