Patch "mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mmc-sdhci-esdhc-imx-improve-esdhc_flag_err010450.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 838861a0815ed289a0d4f1591da3e2f9801f8935
Author: Giulio Benetti <giulio.benetti@xxxxxxxxxxxxxxxxxxxxxx>
Date:   Fri Aug 11 23:48:53 2023 +0200

    mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450
    
    [ Upstream commit 5ae4b0d8875caa44946e579420c7fd5740d58653 ]
    
    Errata ERR010450 only shows up if voltage is 1.8V, but if the device is
    supplied by 3v3 the errata can be ignored. So let's check for if quirk
    SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the frequency.
    
    Cc: Jim Reinhart <jimr@xxxxxxxxxx>
    Cc: James Autry <jautry@xxxxxxxxxx>
    Cc: Matthew Maron <matthewm@xxxxxxxxxx>
    Signed-off-by: Giulio Benetti <giulio.benetti@xxxxxxxxxxxxxxxxxxxxxx>
    Acked-by: Haibo Chen <haibo.chen@xxxxxxx>
    Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20230811214853.8623-1-giulio.benetti@xxxxxxxxxxxxxxxxxxxxxx
    Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 70f388f83485c..b030f657e2534 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -166,8 +166,8 @@
 #define ESDHC_FLAG_HS400		BIT(9)
 /*
  * The IP has errata ERR010450
- * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
- * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
+ * uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card
+ * clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
  */
 #define ESDHC_FLAG_ERR010450		BIT(10)
 /* The IP supports HS400ES mode */
@@ -873,7 +873,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
 		| ESDHC_CLOCK_MASK);
 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
 
-	if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
+	if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) &&
+	    (!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) {
 		unsigned int max_clock;
 
 		max_clock = imx_data->is_ddr ? 45000000 : 150000000;



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