Patch "ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210" has been added to the 4.19-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210

to the 4.19-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-dts-s5pv210-add-rtc-32-khz-clock-in-smdkv210.patch
and it can be found in the queue-4.19 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 85add9747524a76d14a3455395729e5a8be39957
Author: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
Date:   Mon Sep 7 18:11:30 2020 +0200

    ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210
    
    [ Upstream commit 7260b363457a22b8723d5cbc43fee67397896d07 ]
    
    The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
    However the PMIC is not described in DTS at all so at least add
    a workaround to model its clock with a fixed-clock.
    
    This fixes dtbs_check warnings:
    
      rtc@e2800000: clocks: [[2, 145]] is too short
      rtc@e2800000: clock-names: ['rtc'] is too short
    
    Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20200907161141.31034-15-krzk@xxxxxxxxxx
    Stable-dep-of: 982655cb0e7f ("ARM: dts: samsung: s5pv210-smdkv210: correct ethernet reg addresses (split)")
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm/boot/dts/s5pv210-smdkv210.dts b/arch/arm/boot/dts/s5pv210-smdkv210.dts
index 84b38f1851991..1f20622da7194 100644
--- a/arch/arm/boot/dts/s5pv210-smdkv210.dts
+++ b/arch/arm/boot/dts/s5pv210-smdkv210.dts
@@ -31,6 +31,13 @@ memory@20000000 {
 		reg = <0x20000000 0x40000000>;
 	};
 
+	pmic_ap_clk: clock-0 {
+		/* Workaround for missing PMIC and its clock */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+	};
+
 	ethernet@18000000 {
 		compatible = "davicom,dm9000";
 		reg = <0xA8000000 0x2 0xA8000002 0x2>;
@@ -147,6 +154,8 @@ &uart3 {
 
 &rtc {
 	status = "okay";
+	clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
+	clock-names = "rtc", "rtc_src";
 };
 
 &sdhci0 {



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