Patch "arm64: dts: qcom: sc8180x: Fix LLCC reg property" has been added to the 6.5-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sc8180x: Fix LLCC reg property

to the 6.5-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sc8180x-fix-llcc-reg-property.patch
and it can be found in the queue-6.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 228d1690b6f9d8288fbfa38665e3aa883719818c
Author: Bjorn Andersson <quic_bjorande@xxxxxxxxxxx>
Date:   Mon Jun 12 15:06:32 2023 -0700

    arm64: dts: qcom: sc8180x: Fix LLCC reg property
    
    [ Upstream commit 74cf6675c35ec3034053a69926f4d98e52852eb0 ]
    
    The LLCC binding and driver was recently corrected to handle the stride
    varying between platforms. Switch to the new format to ensure accesses
    are done in the right place.
    
    Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
    Signed-off-by: Bjorn Andersson <quic_bjorande@xxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20230612220632.1885175-1-quic_bjorande@xxxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 8a6d9e0914ad9..9aac5861a9132 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2542,8 +2542,11 @@ usb_sec_dpphy: dp-phy@88ef200 {
 
 		system-cache-controller@9200000 {
 			compatible = "qcom,sc8180x-llcc";
-			reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>;
-			reg-names = "llcc_base", "llcc_broadcast_base";
+			reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>,
+			      <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>,
+			      <0 0x09600000 0 0x50000>;
+			reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
+				    "llcc3_base", "llcc_broadcast_base";
 			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
 		};
 



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