Patch "ASoC: fsl_sai: Disable bit clock with transmitter" has been added to the 5.4-stable tree

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This is a note to let you know that I've just added the patch titled

    ASoC: fsl_sai: Disable bit clock with transmitter

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     asoc-fsl_sai-disable-bit-clock-with-transmitter.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit da89b89851ba4f137c4e921905c368a4b4c88d82
Author: Matus Gajdos <matuszpd@xxxxxxxxx>
Date:   Wed Jul 12 14:49:33 2023 +0200

    ASoC: fsl_sai: Disable bit clock with transmitter
    
    [ Upstream commit 269f399dc19f0e5c51711c3ba3bd06e0ef6ef403 ]
    
    Otherwise bit clock remains running writing invalid data to the DAC.
    
    Signed-off-by: Matus Gajdos <matuszpd@xxxxxxxxx>
    Acked-by: Shengjiu Wang <shengjiu.wang@xxxxxxxxx>
    Cc: stable@xxxxxxxxxxxxxxx
    Link: https://lore.kernel.org/r/20230712124934.32232-1-matuszpd@xxxxxxxxx
    Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index ebca0778d3f57..fdbfaedda4ce8 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -548,7 +548,7 @@ static void fsl_sai_config_disable(struct fsl_sai *sai, int dir)
 	u32 xcsr, count = 100;
 
 	regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
-			   FSL_SAI_CSR_TERE, 0);
+			   FSL_SAI_CSR_TERE | FSL_SAI_CSR_BCE, 0);
 
 	/* TERE will remain set till the end of current frame */
 	do {
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 156ee28077b76..771990396804c 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -87,6 +87,7 @@
 /* SAI Transmit/Receive Control Register */
 #define FSL_SAI_CSR_TERE	BIT(31)
 #define FSL_SAI_CSR_SE		BIT(30)
+#define FSL_SAI_CSR_BCE		BIT(28)
 #define FSL_SAI_CSR_FR		BIT(25)
 #define FSL_SAI_CSR_SR		BIT(24)
 #define FSL_SAI_CSR_xF_SHIFT	16



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