This is a note to let you know that I've just added the patch titled
drm/amd/display: trigger timing sync only if TG is running
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-amd-display-trigger-timing-sync-only-if-tg-is-running.patch
and it can be found in the queue-6.1 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From stable-owner@xxxxxxxxxxxxxxx Fri Aug 11 23:09:25 2023
From: Mario Limonciello <mario.limonciello@xxxxxxx>
Date: Fri, 11 Aug 2023 16:07:08 -0500
Subject: drm/amd/display: trigger timing sync only if TG is running
To: <stable@xxxxxxxxxxxxxxx>
Cc: <Tianci.Yin@xxxxxxx>, <Richard.Gong@xxxxxxx>, <Aurabindo.Pillai@xxxxxxx>, Mario Limonciello <mario.limonciello@xxxxxxx>
Message-ID: <20230811210708.14512-11-mario.limonciello@xxxxxxx>
From: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
commit 6066aaf74f510fc171dbe9375153aee2d60d37aa upstream
[Why&How]
If the timing generator isnt running, it does not make sense to trigger
a sync on the corresponding OTG. Check this condition before starting.
Otherwise, this will cause error like:
*ERROR* GSL: Timeout on reset trigger!
Fixes: dc55b106ad47 ("drm/amd/display: Disable phantom OTG after enable for plane disable")
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
[ NOTE: This is also 5f9f97c02dd2 ("drm/amd/display: trigger timing sync
only if TG is running") ]
Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2284,6 +2284,12 @@ void dcn10_enable_timing_synchronization
opp = grouped_pipes[i]->stream_res.opp;
tg = grouped_pipes[i]->stream_res.tg;
tg->funcs->get_otg_active_size(tg, &width, &height);
+
+ if (!tg->funcs->is_tg_enabled(tg)) {
+ DC_SYNC_INFO("Skipping timing sync on disabled OTG\n");
+ return;
+ }
+
if (opp->funcs->opp_program_dpg_dimensions)
opp->funcs->opp_program_dpg_dimensions(opp, width, 2*(height) + 1);
}
Patches currently in stable-queue which might be from stable-owner@xxxxxxxxxxxxxxx are
queue-6.1/drm-amd-display-fix-the-build-when-drm_amd_dc_dcn-is-not-set.patch
queue-6.1/drm-amd-pm-fulfill-powerplay-peak-profiling-mode-shader-memory-clock-settings.patch
queue-6.1/drm-amd-display-handle-virtual-hardware-detect.patch
queue-6.1/drm-amd-display-use-update-plane-and-stream-routine-for-dcn32x.patch
queue-6.1/drm-amd-display-avoid-abm-when-odm-combine-is-enabled-for-edp.patch
queue-6.1/drm-amd-pm-fulfill-swsmu-peak-profiling-mode-shader-memory-clock-settings.patch
queue-6.1/drm-amd-pm-avoid-unintentional-shutdown-due-to-temperature-momentary-fluctuation.patch
queue-6.1/drm-amd-display-update-otg-instance-in-the-commit-stream.patch
queue-6.1/drm-amd-pm-expose-swctf-threshold-setting-for-legacy-powerplay.patch
queue-6.1/drm-amd-display-add-function-for-validate-and-update-new-stream.patch
queue-6.1/drm-amd-display-trigger-timing-sync-only-if-tg-is-running.patch
queue-6.1/drm-amd-display-handle-seamless-boot-stream.patch
queue-6.1/drm-amd-display-retain-phantom-plane-stream-if-validation-fails.patch
queue-6.1/drm-amd-display-disable-phantom-otg-after-enable-for-plane-disable.patch
