Patch "spi: dw: Add compatible for Intel Mount Evans SoC" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    spi: dw: Add compatible for Intel Mount Evans SoC

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     spi-dw-add-compatible-for-intel-mount-evans-soc.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit a47a909fedf766372d2d6e58a2e2e2694d9e1dfe
Author: Abe Kohandel <abe.kohandel@xxxxxxxxx>
Date:   Tue Jun 6 07:54:01 2023 -0700

    spi: dw: Add compatible for Intel Mount Evans SoC
    
    [ Upstream commit 0760d5d0e9f0c0e2200a0323a61d1995bb745dee ]
    
    The Intel Mount Evans SoC's Integrated Management Complex uses the SPI
    controller for access to a NOR SPI FLASH. However, the SoC doesn't
    provide a mechanism to override the native chip select signal.
    
    This driver doesn't use DMA for memory operations when a chip select
    override is not provided due to the native chip select timing behavior.
    As a result no DMA configuration is done for the controller and this
    configuration is not tested.
    
    The controller also has an errata where a full TX FIFO can result in
    data corruption. The suggested workaround is to never completely fill
    the FIFO. The TX FIFO has a size of 32 so the fifo_len is set to 31.
    
    Signed-off-by: Abe Kohandel <abe.kohandel@xxxxxxxxx>
    Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20230606145402.474866-2-abe.kohandel@xxxxxxxxx
    Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 26c40ea6dd129..7e8478ad74e55 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -222,6 +222,31 @@ static int dw_spi_intel_init(struct platform_device *pdev,
 	return 0;
 }
 
+/*
+ * The Intel Mount Evans SoC's Integrated Management Complex uses the
+ * SPI controller for access to a NOR SPI FLASH. However, the SoC doesn't
+ * provide a mechanism to override the native chip select signal.
+ *
+ * This driver doesn't use DMA for memory operations when a chip select
+ * override is not provided due to the native chip select timing behavior.
+ * As a result no DMA configuration is done for the controller and this
+ * configuration is not tested.
+ */
+static int dw_spi_mountevans_imc_init(struct platform_device *pdev,
+				      struct dw_spi_mmio *dwsmmio)
+{
+	/*
+	 * The Intel Mount Evans SoC's Integrated Management Complex DW
+	 * apb_ssi_v4.02a controller has an errata where a full TX FIFO can
+	 * result in data corruption. The suggested workaround is to never
+	 * completely fill the FIFO. The TX FIFO has a size of 32 so the
+	 * fifo_len is set to 31.
+	 */
+	dwsmmio->dws.fifo_len = 31;
+
+	return 0;
+}
+
 static int dw_spi_canaan_k210_init(struct platform_device *pdev,
 				   struct dw_spi_mmio *dwsmmio)
 {
@@ -350,6 +375,10 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
 	{ .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_hssi_init},
 	{ .compatible = "intel,keembay-ssi", .data = dw_spi_intel_init},
 	{ .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
+	{
+		.compatible = "intel,mountevans-imc-ssi",
+		.data = dw_spi_mountevans_imc_init,
+	},
 	{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
 	{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
 	{ /* end of table */}



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