This is a note to let you know that I've just added the patch titled
pinctrl: amd: Add fields for interrupt status and wake status
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pinctrl-amd-add-fields-for-interrupt-status-and-wake-status.patch
and it can be found in the queue-6.1 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 010f493d90ee1dbc32fa1ce51398f20d494c20c2 Mon Sep 17 00:00:00 2001
From: Mario Limonciello <mario.limonciello@xxxxxxx>
Date: Tue, 28 Mar 2023 12:42:31 -0500
Subject: pinctrl: amd: Add fields for interrupt status and wake status
From: Mario Limonciello <mario.limonciello@xxxxxxx>
commit 010f493d90ee1dbc32fa1ce51398f20d494c20c2 upstream.
If the firmware has misconfigured a GPIO it may cause interrupt
status or wake status bits to be set and not asserted. Add these
to debug output to catch this case.
Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
Link: https://lore.kernel.org/r/20230328174231.8924-3-mario.limonciello@xxxxxxx
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/pinctrl/pinctrl-amd.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -211,6 +211,8 @@ static void amd_gpio_dbg_show(struct seq
char *wake_cntrl1;
char *wake_cntrl2;
char *pin_sts;
+ char *interrupt_sts;
+ char *wake_sts;
char *pull_up_sel;
char *orientation;
char debounce_value[40];
@@ -243,7 +245,7 @@ static void amd_gpio_dbg_show(struct seq
continue;
}
seq_printf(s, "GPIO bank%d\n", bank);
- seq_puts(s, "gpio\tint|active|trigger|S0i3| S3|S4/S5| Z|wake|pull| orient| debounce|reg\n");
+ seq_puts(s, "gpio\t int|active|trigger|S0i3| S3|S4/S5| Z|wake|pull| orient| debounce|reg\n");
for (; i < pin_num; i++) {
seq_printf(s, "#%d\t", i);
raw_spin_lock_irqsave(&gpio_dev->lock, flags);
@@ -274,12 +276,18 @@ static void amd_gpio_dbg_show(struct seq
else
interrupt_mask = "😷";
- seq_printf(s, "%s| %s| %s|",
+ if (pin_reg & BIT(INTERRUPT_STS_OFF))
+ interrupt_sts = "🔥";
+ else
+ interrupt_sts = " ";
+
+ seq_printf(s, "%s %s| %s| %s|",
+ interrupt_sts,
interrupt_mask,
active_level,
level_trig);
} else
- seq_puts(s, " ∅| | |");
+ seq_puts(s, " ∅| | |");
if (pin_reg & BIT(WAKE_CNTRL_OFF_S0I3))
wake_cntrl0 = "⏰";
@@ -305,6 +313,12 @@ static void amd_gpio_dbg_show(struct seq
wake_cntrlz = " ";
seq_printf(s, "%s|", wake_cntrlz);
+ if (pin_reg & BIT(WAKE_STS_OFF))
+ wake_sts = "🔥";
+ else
+ wake_sts = " ";
+ seq_printf(s, " %s|", wake_sts);
+
if (pin_reg & BIT(PULL_UP_ENABLE_OFF)) {
if (pin_reg & BIT(PULL_UP_SEL_OFF))
pull_up_sel = "8k";
Patches currently in stable-queue which might be from mario.limonciello@xxxxxxx are
queue-6.1/pinctrl-amd-detect-internal-gpio0-debounce-handling.patch
queue-6.1/pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch
queue-6.1/pinctrl-amd-adjust-debugfs-output.patch
queue-6.1/pinctrl-amd-revert-pinctrl-amd-disable-and-mask-interrupts-on-probe.patch
queue-6.1/pinctrl-amd-detect-and-mask-spurious-interrupts.patch
queue-6.1/pinctrl-amd-drop-pull-up-select-configuration.patch
queue-6.1/pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch
queue-6.1/pinctrl-amd-add-z-state-wake-control-bits.patch
queue-6.1/drm-amdgpu-sdma4-set-align-mask-to-255.patch
queue-6.1/pinctrl-amd-use-amd_pinconf_set-for-all-config-options.patch
queue-6.1/pinctrl-amd-unify-debounce-handling-into-amd_pinconf_set.patch
queue-6.1/drm-client-send-hotplug-event-after-registering-a-client.patch
queue-6.1/pinctrl-amd-add-fields-for-interrupt-status-and-wake-status.patch
