Patch "pinctrl: amd: Only use special debounce behavior for GPIO 0" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    pinctrl: amd: Only use special debounce behavior for GPIO 0

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 0d5ace1a07f7e846d0f6d972af60d05515599d0b Mon Sep 17 00:00:00 2001
From: Mario Limonciello <mario.limonciello@xxxxxxx>
Date: Wed, 5 Jul 2023 08:30:02 -0500
Subject: pinctrl: amd: Only use special debounce behavior for GPIO 0

From: Mario Limonciello <mario.limonciello@xxxxxxx>

commit 0d5ace1a07f7e846d0f6d972af60d05515599d0b upstream.

It's uncommon to use debounce on any other pin, but technically
we should only set debounce to 0 when working off GPIO0.

Cc: stable@xxxxxxxxxxxxxxx
Tested-by: Jan Visser <starquake@xxxxxxxxxxxxxxxxxxx>
Fixes: 968ab9261627 ("pinctrl: amd: Detect internal GPIO0 debounce handling")
Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
Link: https://lore.kernel.org/r/20230705133005.577-2-mario.limonciello@xxxxxxx
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 drivers/pinctrl/pinctrl-amd.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -128,9 +128,11 @@ static int amd_gpio_set_debounce(struct
 	raw_spin_lock_irqsave(&gpio_dev->lock, flags);
 
 	/* Use special handling for Pin0 debounce */
-	pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
-	if (pin_reg & INTERNAL_GPIO0_DEBOUNCE)
-		debounce = 0;
+	if (offset == 0) {
+		pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
+		if (pin_reg & INTERNAL_GPIO0_DEBOUNCE)
+			debounce = 0;
+	}
 
 	pin_reg = readl(gpio_dev->base + offset * 4);
 


Patches currently in stable-queue which might be from mario.limonciello@xxxxxxx are

queue-5.10/pinctrl-amd-detect-internal-gpio0-debounce-handling.patch
queue-5.10/pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch
queue-5.10/pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch



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