Patch "drm/i915: Fix one wrong caching mode enum usage" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/i915: Fix one wrong caching mode enum usage

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-fix-one-wrong-caching-mode-enum-usage.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit af77ab19f6ed0aaca5fe1aedcbf30b39aa643961
Author: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
Date:   Fri Jul 7 13:55:03 2023 +0100

    drm/i915: Fix one wrong caching mode enum usage
    
    [ Upstream commit 113899c2669dff148b2a5bea4780123811aecc13 ]
    
    Commit a4d86249c773 ("drm/i915/gt: Provide a utility to create a scratch
    buffer") mistakenly passed in uapi I915_CACHING_CACHED as argument to
    i915_gem_object_set_cache_coherency(), which actually takes internal
    enum i915_cache_level.
    
    No functional issue since the value matches I915_CACHE_LLC (1 == 1), which
    is the intended caching mode, but lets clean it up nevertheless.
    
    Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
    Fixes: a4d86249c773 ("drm/i915/gt: Provide a utility to create a scratch buffer")
    Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
    Reviewed-by: Tejas Upadhyay <tejas.upadhyay@xxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20230707125503.3965817-1-tvrtko.ursulin@xxxxxxxxxxxxxxx
    (cherry picked from commit 49c60b2f0867ac36fd54d513882a48431aeccae7)
    Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 2eaeba14319e9..f4879f437bfa3 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -611,7 +611,7 @@ __vm_create_scratch_for_read(struct i915_address_space *vm, unsigned long size)
 	if (IS_ERR(obj))
 		return ERR_CAST(obj);
 
-	i915_gem_object_set_cache_coherency(obj, I915_CACHING_CACHED);
+	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
 
 	vma = i915_vma_instance(obj, vm, NULL);
 	if (IS_ERR(vma)) {



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