This is a note to let you know that I've just added the patch titled
drm/amd/pm: revise the ASPM settings for thunderbolt attached scenario
to the 6.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch
and it can be found in the queue-6.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From stable-owner@xxxxxxxxxxxxxxx Fri Jul 7 17:08:25 2023
From: Alex Deucher <alexander.deucher@xxxxxxx>
Date: Fri, 7 Jul 2023 11:07:29 -0400
Subject: drm/amd/pm: revise the ASPM settings for thunderbolt attached scenario
To: <stable@xxxxxxxxxxxxxxx>
Cc: <mario.limonciello@xxxxxxx>, Evan Quan <evan.quan@xxxxxxx>, Alex Deucher <alexander.deucher@xxxxxxx>
Message-ID: <20230707150734.746135-4-alexander.deucher@xxxxxxx>
From: Evan Quan <evan.quan@xxxxxxx>
commit fd21987274463a439c074b8f3c93d3b132e4c031 upstream
Also, correct the comment for NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT
as 0x0000000E stands for 400ms instead of 4ms.
Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
@@ -346,7 +346,7 @@ static void nbio_v2_3_init_registers(str
#define NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT 0x00000000 // off by default, no gains over L1
#define NAVI10_PCIE__LC_L1_INACTIVITY_DEFAULT 0x00000009 // 1=1us, 9=1ms
-#define NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT 0x0000000E // 4ms
+#define NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT 0x0000000E // 400ms
static void nbio_v2_3_enable_aspm(struct amdgpu_device *adev,
bool enable)
@@ -479,9 +479,12 @@ static void nbio_v2_3_program_aspm(struc
WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5, data);
def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
- data &= ~PCIE_LC_CNTL__LC_L0S_INACTIVITY_MASK;
- data |= 0x9 << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT;
- data |= 0x1 << PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT;
+ data |= NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT;
+ if (pci_is_thunderbolt_attached(adev->pdev))
+ data |= NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT;
+ else
+ data |= NAVI10_PCIE__LC_L1_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT;
+ data &= ~PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK;
if (def != data)
WREG32_PCIE(smnPCIE_LC_CNTL, data);
Patches currently in stable-queue which might be from stable-owner@xxxxxxxxxxxxxxx are
queue-6.4/drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch
queue-6.4/drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch
queue-6.4/drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch
queue-6.4/drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch
queue-6.4/drm-amdgpu-sdma4-set-align-mask-to-255.patch
queue-6.4/drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch
queue-6.4/drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch
