Patch "drm/i915/psr: Fix BDW PSR AUX CH data register offsets" has been added to the 6.4-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/i915/psr: Fix BDW PSR AUX CH data register offsets

to the 6.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-psr-fix-bdw-psr-aux-ch-data-register-offset.patch
and it can be found in the queue-6.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit b11165fd42a835e3f9281547b67751f56457112e
Author: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Date:   Fri Jun 9 17:13:53 2023 +0300

    drm/i915/psr: Fix BDW PSR AUX CH data register offsets
    
    [ Upstream commit fdffb7dbc74f48cb1d404d9ab0c9fd769a59caf0 ]
    
    The multiplication got replaced by an addition in some cleanup.
    This means we never write the correct data to some of the BDW
    PSR data registers and thus we fail to actually wake up the
    panel from PSR.
    
    Fixes: 4ab4fa103217 ("drm/i915/psr: Make PSR registers relative to transcoders")
    Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-3-ville.syrjala@xxxxxxxxxxxxxxx
    Reviewed-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
    (cherry picked from commit 460dc4ba1442b3e5e543328d11db2702b98d3d7c)
    Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 958d8cabc44b5..5e3fe23ef8eb2 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -75,7 +75,7 @@
 
 #define _SRD_AUX_DATA_A				0x60814
 #define _SRD_AUX_DATA_EDP			0x6f814
-#define EDP_PSR_AUX_DATA(tran, i)		_MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) + 4) /* 5 registers */
+#define EDP_PSR_AUX_DATA(tran, i)		_MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */
 
 #define _SRD_STATUS_A				0x60840
 #define _SRD_STATUS_EDP				0x6f840



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