Patch "ARM: dts: lan966x: kontron-d10: fix SPI CS" has been added to the 6.3-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: dts: lan966x: kontron-d10: fix SPI CS

to the 6.3-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-dts-lan966x-kontron-d10-fix-spi-cs.patch
and it can be found in the queue-6.3 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 225500356c0cad924b7cbb9c1ea773b6b73fa6f7
Author: Michael Walle <mwalle@xxxxxxxxxx>
Date:   Fri Jun 16 15:18:40 2023 +0200

    ARM: dts: lan966x: kontron-d10: fix SPI CS
    
    [ Upstream commit fcb79ee3f0b15ed15f35eca5f24e952fdced9c61 ]
    
    The pinctrl node was missing which change the pin mux to GPIO mode.
    Add it so we don't have to rely on the bootloader to set the correct
    mode.
    
    Fixes: 79d83b3a458e ("ARM: dts: lan966x: add basic Kontron KSwitch D10 support")
    Signed-off-by: Michael Walle <mwalle@xxxxxxxxxx>
    Signed-off-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20230616-feature-d10-dt-cleanups-v1-2-50dd0452b8fe@xxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
index 42be207509a46..f4df4cc1dfa5e 100644
--- a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
+++ b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
@@ -41,7 +41,7 @@ &flx3 {
 	status = "okay";
 
 	spi3: spi@400 {
-		pinctrl-0 = <&fc3_b_pins>;
+		pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>;
 		pinctrl-names = "default";
 		status = "okay";
 		cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
@@ -79,6 +79,12 @@ sgpio_b_pins: sgpio-b-pins {
 		function = "sgpio_b";
 	};
 
+	spi3_cs_pins: spi3-cs-pins {
+		/* CS# */
+		pins = "GPIO_46";
+		function = "gpio";
+	};
+
 	usart0_pins: usart0-pins {
 		/* RXD, TXD */
 		pins = "GPIO_25", "GPIO_26";



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