Patch "drm/msm/dpu: set DSC flush bit correctly at MDP CTL flush register" has been added to the 6.3-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    drm/msm/dpu: set DSC flush bit correctly at MDP CTL flush register

to the 6.3-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-msm-dpu-set-dsc-flush-bit-correctly-at-mdp-ctl-f.patch
and it can be found in the queue-6.3 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 875a3019efeb7e60b76c512a88f32c7c9b122478
Author: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
Date:   Thu May 25 10:40:49 2023 -0700

    drm/msm/dpu: set DSC flush bit correctly at MDP CTL flush register
    
    [ Upstream commit 12cef323c903bd8b13d1f6ff24a9695c2cdc360b ]
    
    The CTL_FLUSH register should be programmed with the 22th bit
    (DSC_IDX) to flush the DSC hardware blocks, not the literal value of
    22 (which corresponds to flushing VIG1, VIG2 and RGB1 instead).
    
    Changes in V12:
    -- split this patch out of "separate DSC flush update out of interface"
    
    Changes in V13:
    -- rewording the commit text
    
    Changes in V14:
    -- drop 'DSC" from "The DSC CTL_FLUSH register" at commit text
    
    Fixes: 77f6da90487c ("drm/msm/disp/dpu1: Add DSC support in hw_ctl")
    Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
    Reviewed-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
    Patchwork: https://patchwork.freedesktop.org/patch/539496/
    Link: https://lore.kernel.org/r/1685036458-22683-2-git-send-email-quic_khsieh@xxxxxxxxxxx
    Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 6c53ea560ffaa..3ef2e37b41087 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -505,7 +505,7 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx,
 		DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE,
 			      BIT(cfg->merge_3d - MERGE_3D_0));
 	if (cfg->dsc) {
-		DPU_REG_WRITE(&ctx->hw, CTL_FLUSH, DSC_IDX);
+		DPU_REG_WRITE(&ctx->hw, CTL_FLUSH, BIT(DSC_IDX));
 		DPU_REG_WRITE(c, CTL_DSC_ACTIVE, cfg->dsc);
 	}
 }