This is a note to let you know that I've just added the patch titled
arm64: dts: qcom: sm8550: Use the correct LLCC register scheme
to the 6.3-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-qcom-sm8550-use-the-correct-llcc-register-scheme.patch
and it can be found in the queue-6.3 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 661a4f089317c877aecd598fb70cd46510cc8d29 Mon Sep 17 00:00:00 2001
From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Date: Wed, 17 May 2023 04:18:50 +0200
Subject: arm64: dts: qcom: sm8550: Use the correct LLCC register scheme
From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
commit 661a4f089317c877aecd598fb70cd46510cc8d29 upstream.
During the ABI-breaking (for good reasons) conversion of the LLCC
register description, SM8550 was not taken into account, resulting
in LLCC being broken on any kernel containing the patch referenced
in the fixes tag.
Fix it by describing the regions properly.
Fixes: ee13b5008707 ("qcom: llcc/edac: Fix the base address used for accessing LLCC banks")
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Acked-by: Manivannan Sadhasivam <mani@xxxxxxxxxx>
Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230517-topic-kailua-llcc-v1-2-d57bd860c43e@xxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3423,9 +3423,16 @@
system-cache-controller@25000000 {
compatible = "qcom,sm8550-llcc";
- reg = <0 0x25000000 0 0x800000>,
+ reg = <0 0x25000000 0 0x200000>,
+ <0 0x25200000 0 0x200000>,
+ <0 0x25400000 0 0x200000>,
+ <0 0x25600000 0 0x200000>,
<0 0x25800000 0 0x200000>;
- reg-names = "llcc_base", "llcc_broadcast_base";
+ reg-names = "llcc0_base",
+ "llcc1_base",
+ "llcc2_base",
+ "llcc3_base",
+ "llcc_broadcast_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
};
Patches currently in stable-queue which might be from konrad.dybcio@xxxxxxxxxx are
queue-6.3/arm64-dts-qcom-sm8550-use-the-correct-llcc-register-scheme.patch
queue-6.3/regulator-qcom-rpmh-add-support-for-pmm8654au-regula.patch
