Patch "net/mlx5: Read embedded cpu after init bit cleared" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    net/mlx5: Read embedded cpu after init bit cleared

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     net-mlx5-read-embedded-cpu-after-init-bit-cleared.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit c44b818ce43a76f732ecc1f65435a37fb7e83fa4
Author: Moshe Shemesh <moshe@xxxxxxxxxx>
Date:   Fri Apr 28 13:48:13 2023 +0300

    net/mlx5: Read embedded cpu after init bit cleared
    
    [ Upstream commit bbfa4b58997e3d38ba629c9f6fc0bd1c163aaf43 ]
    
    During driver load it reads embedded_cpu bit from initialization
    segment, but the initialization segment is readable only after
    initialization bit is cleared.
    
    Move the call to mlx5_read_embedded_cpu() right after initialization bit
    cleared.
    
    Signed-off-by: Moshe Shemesh <moshe@xxxxxxxxxx>
    Fixes: 591905ba9679 ("net/mlx5: Introduce Mellanox SmartNIC and modify page management logic")
    Reviewed-by: Shay Drory <shayd@xxxxxxxxxx>
    Signed-off-by: Saeed Mahameed <saeedm@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index da4ca0f67e9ce..22907f6364f54 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -783,7 +783,6 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct pci_dev *pdev,
 	}
 
 	mlx5_pci_vsc_init(dev);
-	dev->caps.embedded_cpu = mlx5_read_embedded_cpu(dev);
 	return 0;
 
 err_clr_master:
@@ -978,6 +977,7 @@ static int mlx5_function_setup(struct mlx5_core_dev *dev, bool boot)
 		goto err_cmd_cleanup;
 	}
 
+	dev->caps.embedded_cpu = mlx5_read_embedded_cpu(dev);
 	mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_UP);
 
 	err = mlx5_core_enable_hca(dev, 0);



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