Patch "drm/amd/display: Change default Z8 watermark values" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amd/display: Change default Z8 watermark values

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-display-change-default-z8-watermark-values.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 6024cfc3867a8bf6f9dd81450856bb37cdc3a3ab
Author: Leo Chen <sancchen@xxxxxxx>
Date:   Thu Apr 13 17:34:24 2023 -0400

    drm/amd/display: Change default Z8 watermark values
    
    [ Upstream commit 8f586cc16c1fc3c2202c9d54563db8c7ed365f82 ]
    
    [Why & How]
    Previous Z8 watermark values were causing flickering and OTC underflow.
    Updating Z8 watermark values based on the measurement.
    
    Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@xxxxxxx>
    Cc: Mario Limonciello <mario.limonciello@xxxxxxx>
    Cc: Alex Deucher <alexander.deucher@xxxxxxx>
    Cc: stable@xxxxxxxxxxxxxxx
    Acked-by: Alan Liu <HaoPing.Liu@xxxxxxx>
    Signed-off-by: Leo Chen <sancchen@xxxxxxx>
    Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
index 2c99193b63fa6..4f91e64754239 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
@@ -148,8 +148,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_14_soc = {
 	.num_states = 5,
 	.sr_exit_time_us = 16.5,
 	.sr_enter_plus_exit_time_us = 18.5,
-	.sr_exit_z8_time_us = 210.0,
-	.sr_enter_plus_exit_z8_time_us = 310.0,
+	.sr_exit_z8_time_us = 268.0,
+	.sr_enter_plus_exit_z8_time_us = 393.0,
 	.writeback_latency_us = 12.0,
 	.dram_channel_width_bytes = 4,
 	.round_trip_ping_latency_dcfclk_cycles = 106,



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