Patch "drm/amd/pm: parse pp_handle under appropriate conditions" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/amd/pm: parse pp_handle under appropriate conditions

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-amd-pm-parse-pp_handle-under-appropriate-conditions.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 58d9b9a14b47c2a3da6effcbb01607ad7edc0275 Mon Sep 17 00:00:00 2001
From: Guchun Chen <guchun.chen@xxxxxxx>
Date: Fri, 5 May 2023 13:20:11 +0800
Subject: drm/amd/pm: parse pp_handle under appropriate conditions

From: Guchun Chen <guchun.chen@xxxxxxx>

commit 58d9b9a14b47c2a3da6effcbb01607ad7edc0275 upstream.

amdgpu_dpm_is_overdrive_supported is a common API across all
asics, so we should cast pp_handle into correct structure
under different power frameworks.

v2: using return directly to simplify code
v3: SI asic does not carry od_enabled member in pp_handle, and update Fixes tag

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2541
Fixes: eb4900aa4c49 ("drm/amdgpu: Fix kernel NULL pointer dereference in dpm functions")
Suggested-by: Mario Limonciello <mario.limonciello@xxxxxxx>
Signed-off-by: Guchun Chen <guchun.chen@xxxxxxx>
Reviewed-by: Mario Limonciello <mario.limonciello@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 drivers/gpu/drm/amd/pm/amdgpu_dpm.c |   20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -1414,15 +1414,21 @@ int amdgpu_dpm_get_smu_prv_buf_details(s
 
 int amdgpu_dpm_is_overdrive_supported(struct amdgpu_device *adev)
 {
-	struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
-	struct smu_context *smu = adev->powerplay.pp_handle;
+	if (is_support_sw_smu(adev)) {
+		struct smu_context *smu = adev->powerplay.pp_handle;
 
-	if ((is_support_sw_smu(adev) && smu->od_enabled) ||
-	    (is_support_sw_smu(adev) && smu->is_apu) ||
-		(!is_support_sw_smu(adev) && hwmgr->od_enabled))
-		return true;
+		return (smu->od_enabled || smu->is_apu);
+	} else {
+		struct pp_hwmgr *hwmgr;
 
-	return false;
+		/* SI asic does not carry od_enabled */
+		if (adev->family == AMDGPU_FAMILY_SI)
+			return false;
+
+		hwmgr = (struct pp_hwmgr *)adev->powerplay.pp_handle;
+
+		return hwmgr->od_enabled;
+	}
 }
 
 int amdgpu_dpm_set_pp_table(struct amdgpu_device *adev,


Patches currently in stable-queue which might be from guchun.chen@xxxxxxx are

queue-6.1/drm-amdgpu-disable-sdma-ecc-irq-only-when-sdma-ras-is-enabled-in-suspend.patch
queue-6.1/drm-amd-pm-parse-pp_handle-under-appropriate-conditions.patch
queue-6.1/drm-amdgpu-fix-amdgpu_irq_put-call-trace-in-gmc_v10_0_hw_fini.patch
queue-6.1/drm-amdgpu-gfx-disable-gfx9-cp_ecc_error_irq-only-when-enabling-legacy-gfx-ras.patch
queue-6.1/drm-amd-pm-avoid-potential-ubsan-issue-on-legacy-asics.patch
queue-6.1/drm-amdgpu-fix-amdgpu_irq_put-call-trace-in-gmc_v11_0_hw_fini.patch



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