Patch "x86/apic: Fix atomic update of offset in reserve_eilvt_offset()" has been added to the 6.2-stable tree

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This is a note to let you know that I've just added the patch titled

    x86/apic: Fix atomic update of offset in reserve_eilvt_offset()

to the 6.2-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     x86-apic-fix-atomic-update-of-offset-in-reserve_eilv.patch
and it can be found in the queue-6.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit d6c352c99233bd4fdb373a06f1a6f30bbe773c9c
Author: Uros Bizjak <ubizjak@xxxxxxxxx>
Date:   Mon Feb 27 17:09:17 2023 +0100

    x86/apic: Fix atomic update of offset in reserve_eilvt_offset()
    
    [ Upstream commit f96fb2df3eb31ede1b34b0521560967310267750 ]
    
    The detection of atomic update failure in reserve_eilvt_offset() is
    not correct. The value returned by atomic_cmpxchg() should be compared
    to the old value from the location to be updated.
    
    If these two are the same, then atomic update succeeded and
    "eilvt_offsets[offset]" location is updated to "new" in an atomic way.
    
    Otherwise, the atomic update failed and it should be retried with the
    value from "eilvt_offsets[offset]" - exactly what atomic_try_cmpxchg()
    does in a correct and more optimal way.
    
    Fixes: a68c439b1966c ("apic, x86: Check if EILVT APIC registers are available (AMD only)")
    Signed-off-by: Uros Bizjak <ubizjak@xxxxxxxxx>
    Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20230227160917.107820-1-ubizjak@xxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 20d9a604da7c4..7705571100518 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -422,10 +422,9 @@ static unsigned int reserve_eilvt_offset(int offset, unsigned int new)
 		if (vector && !eilvt_entry_is_changeable(vector, new))
 			/* may not change if vectors are different */
 			return rsvd;
-		rsvd = atomic_cmpxchg(&eilvt_offsets[offset], rsvd, new);
-	} while (rsvd != new);
+	} while (!atomic_try_cmpxchg(&eilvt_offsets[offset], &rsvd, new));
 
-	rsvd &= ~APIC_EILVT_MASKED;
+	rsvd = new & ~APIC_EILVT_MASKED;
 	if (rsvd && rsvd != vector)
 		pr_info("LVT offset %d assigned for vector 0x%02x\n",
 			offset, rsvd);



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