This is a note to let you know that I've just added the patch titled
arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB
to the 6.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-ti-k3-am62a7-correct-l2-cache-size-to-512k.patch
and it can be found in the queue-6.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit 3d26c3142cd79b26d21255fa84f3fd3b9fc5a955
Author: Vignesh Raghavendra <vigneshr@xxxxxx>
Date: Mon Mar 20 10:19:35 2023 +0530
arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB
[ Upstream commit 438b8dc949bf45979c32553e96086ff1c6e2504e ]
Per AM62Ax SoC datasheet[0] L2 cache is 512KB.
[0] https://www.ti.com/lit/gpn/am62a7 Page 1.
Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Vignesh Raghavendra <vigneshr@xxxxxx>
Link: https://lore.kernel.org/r/20230320044935.2512288-2-vigneshr@xxxxxx
Signed-off-by: Nishanth Menon <nm@xxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
index 331d89fda29d0..f1ebaec404fbc 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
@@ -96,7 +96,7 @@ cpu3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
- cache-size = <0x40000>;
+ cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
};
