This is a note to let you know that I've just added the patch titled
arm64: dts: qcom: msm8996: Fix the PCI I/O port range
to the 6.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-qcom-msm8996-fix-the-pci-i-o-port-range.patch
and it can be found in the queue-6.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit 99bb9978f2946c450658bead9a3c3986dcad78eb
Author: Manivannan Sadhasivam <mani@xxxxxxxxxx>
Date: Tue Feb 28 22:17:43 2023 +0530
arm64: dts: qcom: msm8996: Fix the PCI I/O port range
[ Upstream commit cf0ac10feb17661987d0018eb9475dc03e2a2253 ]
For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses
(0x0c200000, 0x0d200000, 0x0e200000) specified in the ranges property for
I/O region.
While at it, let's also align the entries.
Fixes: ed965ef89227 ("arm64: dts: qcom: msm8996: add support to pcie")
Reported-by: Arnd Bergmann <arnd@xxxxxxxx>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@xxxxxxxxxxxxxxxx/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Reviewed-by: Arnd Bergmann <arnd@xxxxxxxx>
Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230228164752.55682-8-manivannan.sadhasivam@xxxxxxxxxx
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 71678749d66f6..25d97cc2d08ff 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1841,8 +1841,8 @@ pcie0: pcie@600000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x0c200000 0x0c200000 0x0 0x100000>,
- <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
+ ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>,
+ <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
device_type = "pci";
@@ -1895,8 +1895,8 @@ pcie1: pcie@608000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x0d200000 0x0d200000 0x0 0x100000>,
- <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
+ ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>,
+ <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
device_type = "pci";
@@ -1946,8 +1946,8 @@ pcie2: pcie@610000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x0e200000 0x0e200000 0x0 0x100000>,
- <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
+ ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>,
+ <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
device_type = "pci";
