This is a note to let you know that I've just added the patch titled
arm64: dts: qcom: sm8550: misc style fixes
to the 6.3-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-qcom-sm8550-misc-style-fixes.patch
and it can be found in the queue-6.3 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit cd40ac32d39712632fc186c386cf75d52a21251e
Author: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
Date: Wed Mar 8 09:32:54 2023 +0100
arm64: dts: qcom: sm8550: misc style fixes
[ Upstream commit f03908b23f84ecd49f12facf4acf34c3ad24f27a ]
Miscellaneous DT fixes to remove spurious blank line and enhance readability.
Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
Fixes: d7da51db5b81 ("arm64: dts: qcom: sm8550: add display hardware devices")
Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230308-topic-sm8550-upstream-dt-fixups-v1-3-595b02067672@xxxxxxxxxx
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 7da28b36470e8..f05cdb376a175 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -412,7 +412,6 @@ xbl_sc_mem: xbl-sc-region@d8100000 {
no-map;
};
-
hyp_tags_reserved_mem: hyp-tags-reserved-region@811d0000 {
reg = <0 0x811d0000 0 0x30000>;
no-map;
@@ -2195,7 +2194,8 @@ mdss_dsi0: dsi@ae94000 {
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>;
operating-points-v2 = <&mdss_dsi_opp_table>;
@@ -2287,8 +2287,10 @@ mdss_dsi1: dsi@ae96000 {
power-domains = <&rpmhpd SM8550_MMCX>;
- assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
+ assigned-clock-parents = <&mdss_dsi1_phy 0>,
+ <&mdss_dsi1_phy 1>;
operating-points-v2 = <&mdss_dsi_opp_table>;
@@ -3156,7 +3158,7 @@ apps_smmu: iommu@15000000 {
intc: interrupt-controller@17100000 {
compatible = "arm,gic-v3";
- reg = <0 0x17100000 0 0x10000>, /* GICD */
+ reg = <0 0x17100000 0 0x10000>, /* GICD */
<0 0x17180000 0 0x200000>; /* GICR * 8 */
ranges;
#interrupt-cells = <3>;
